Advanced Digital Fault Tolerance Expert

6 days ago

kozhikode, India beBeeDft Full time

Senior DFT StrategistThis is a challenging position for a Senior DFT Strategist to oversee DFT architecture, planning, and implementation across complex SoC/ASIC designs.The successful candidate will have 7+ years of experience in DFT for complex ASIC or SoC designs, expertise in scan insertion, compression, ATPG, MBIST, and boundary scan.Main Responsibilities:Develop and drive DFT strategy and architecture for multiple ASIC/SoC projects.Manage end-to-end DFT flow — from RTL to gate-level netlist and silicon bring-up.Collaborate with RTL, STA, PD, and test engineering teams for seamless integration.Support silicon bring-up, test vector validation on ATE, and yield optimization.Required Skills and Experience:B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Design.Expertise in Synopsys: DFT Compiler, TetraMAX, TestMAX, Siemens EDA: Tessent ScanPro, MBIST, IJTAG, Cadence/others: Modus, Encounter Test.Proficient in scripting languages (Python, Perl, Tcl) for flow automation.

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