Advanced Analog Design Specialist

5 days ago

bikaner, India beBeeLayout Full time

Job Title: Senior Analog Layout EngineerWe are looking for a highly experienced professional to take ownership of IP development, verification, integration, and delivery.This role requires deep knowledge of ICC2-based top-level integration, extensive IP verification experience, and the ability to run block-level simulations independently.The ideal candidate will lead chip-level planning and integration of high-speed analog IPs, execute complete analog layout design, and run post-layout simulations (corners, Monte Carlo, extracted netlist) and ensure correlation with schematic.Key Responsibilities:Lead chip-level planning and integration of high-speed analog IPsExecute complete analog layout design including floor planning, routing, device matching, shielding, EM/IR checks, and parasitic optimizationRun post-layout simulations (corners, Monte Carlo, extracted netlist) and ensure correlation with schematicOwn the entire IP verification process: DRC, LVS, ERC, ANT, PEX, and reliability checksEnsure zero-violation GDS delivery for IP signoffWork closely with foundry teams on PDK clarifications, rule updates, model issues, PEX discussions, and tape-out requirementsCross-functional collaboration with PD, DV, circuit design, packaging, and integration teams for seamless IP deliveryPrepare and deliver comprehensive IP documentation, abstracts, verification reports, and final GDSRequired Skills and Qualifications:8+ years of proven experience in Analog/Mixed-Signal LayoutDeep expertise in high-speed IPs: SERDES, PLL, ADC/DAC, Tx/Rx, clocking blocksStrong understanding of chip-level hierarchy, integration, and physical interfacesProficiency in Cadence Virtuoso, PVS, Calibre, and extraction toolsIn-depth knowledge of DRC/LVS/ERC, PEX & RC Extraction, Signoff decks and reliability checksExperience interfacing with foundry teams for rule clarifications and tape-out signoffStrong sense of ownership in IP development, customer communications, and documentationBonus Points:Experience with other advanced process nodes (7nm/3nm)Exposure to SERDES/PCIe/MIPI/USB high-speed IPsExperience working with global clientsIf you have the skills and qualifications we're looking for, please apply today

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