Senior DFT Engineer
6 days ago
Job Title: DFT Engineer / Senior DFT Engineer / Lead / Manager / Staff EngineerExperience Range: 3 – 17 Years Location: Bangalore / Noida / Chennai Notice Period: Immediate to 90 Days Open Positions:Lead / Manager – 4 PositionsJunior & Mid-Level – 20+ Positions (For multiple Customer-Based, In-House & Turnkey Projects)📧 Send Profiles to: kalavathi.srinivas@acldigital.comKey ResponsibilitiesDepending on experience level (Junior/Mid/Lead/Manager/Staff):Ownership of DFT architecture, planning, integration & verificationDevelopment of Scan/ATPG/MBIST/JTAG/BSCAN/Boundary Scan logic and flowsDFT insertion, pattern generation, fault coverage analysis and sign-offWork with RTL, Physical Design, STA, and Silicon Validation teamsATPG coverage improvements, debugging and yield enhancementMemory BIST architecture and test algorithm integrationPost-silicon bring-up, ATE vector debug, production ramp supportDrive DFT methodologies, automation & best practices across projectsMentoring juniors, project planning & customer interaction (Lead/Manager roles)Mandatory Technical SkillsCandidates should have experience in one or more DFT areas:✔ Scan Insertion, Compression & ATPG ✔ JTAG/BSCAN/Boundary Scan/IEEE 1149.x ✔ MBIST/Logic BIST/Analog & Mixed-Signal BIST ✔ ATPG pattern debugging, DRC/Lint fixing, STA timing for test modes ✔ DFT Sign-off & Coverage closureTool Experience (preferred): Siemens Tessent, Synopsys TetraMAX, D-Compiler, Modus, Genus, SMS, FastScan, TestMAX, Shell scripting, Python/TCL for automationNice to Have / Emerging & Future DFT Technologies(To attract advanced profiles & future-ready talent)🔹 DFT for 2.5D/3D-IC & Chiplets (UCIe/OpenHBI testing frameworks) 🔹 AI-Driven ATPG optimization & test time reduction 🔹 DFT for RISC-V Architectures, Automotive ASIL standards 🔹 Logic-Diagnosis, Scan-Compression Innovations 🔹 LBIST for functional safety / ISO26262 compliance 🔹 Design-for-Security (DFSec) – Secure JTAG, PUF, Anti-tamper DFT 🔹 Silicon lifecycle management, Telemetry-based test analytics 🔹 Yield ramp modeling & ML-based failure predictionWho Should Apply?We are looking for engineers who:Have strong fundamentals in digital/ASIC/SoC design & testAre passionate about innovation in DFT, automation & scalable methodologiesEnjoy solving complex silicon challenges across latest technology nodesCan work in a fast-paced environment with global customersPerks & Career GrowthWork on advanced nodes (7nm → 3nm → 2nm) and cutting-edge SoCsOpportunity to contribute to future-ready DFT workflows & R&D initiativesLeadership & customer-facing roles for high performersExposure to In-House, Turnkey & Global Tier-1 Semiconductor projects📧 Send Profiles to: kalavathi.srinivas@acldigital.com
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Senior DFT Engineer
6 days ago
bangalore, India L&T Technology Services Full timeL&T Technology is hiring for Senior DFT Engineers / Lead DFT Engineer with 8-15 Years of experience. Job Location : Bangalore Skills Expertise should be : ATPG, SOC, ASIC DFT.
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Senior DFT Engineer
1 week ago
bangalore, India Best NanoTech Full timeJob Title: Senior DFT Engineer (Architecture & Implementation)Location: BengaluruExperience: 5+ YearsAbout the Mission At Best NanoTech, we are building the silicon engines of the future. Whether it's AI accelerators or autonomous driving processors, our chips are massive and complex. Our DFT team is responsible for ensuring that every transistor we print...
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Senior DFT Engineer
5 days ago
bangalore, India Best NanoTech Full timeJob Title: Senior DFT Engineer (Architecture & Implementation) Location: Bengaluru Experience: 5+ Years About the Mission At Best NanoTech, we are building the silicon engines of the future. Whether it's AI accelerators or autonomous driving processors, our chips are massive and complex. Our DFT team is responsible for ensuring that every transistor we print...
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Senior DFT Engineer
1 week ago
bangalore, India ACL Digital Full timeJob Title: DFT Engineer / Senior DFT Engineer / Lead / Manager / Staff Engineer Experience Range: 3 – 17 Years Location: Bangalore / Noida / Chennai Notice Period: Immediate to 90 Days Open Positions: Lead / Manager – 4 Positions Junior & Mid-Level – 20+ Positions (For multiple Customer-Based, In-House & Turnkey Projects ) Send Profiles to: Key...
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DFT Engineer
2 weeks ago
bangalore, India Mirafra Technologies Full timeHi Folks,Greetings from Mirafra Technologies We are looking for Senior DFT Engineers with strong expertise in ASIC/SOC DFT implementation. Experience: 7+ Years Notice Period: 0–30 Days (Immediate Joiners Preferred) Location: Noida / BangaloreKey Skills:DFT Architecture, Scan Insertion, ATPG, MBIST, LBISTExperience with Synopsys / Tessent / Mentor DFT...
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Senior DFT Engineer
2 weeks ago
bangalore, India Eximietas Design Full timeHi All,Greetings from Eximietas...!Position: Senior DFT Engineers/Leads/Architects.Experience: 5-20 Years.Locations:Bengaluru, IndiaVisakhapatnam, IndiaSan Jose (Bay Area), USAAustin, USAEligibility (US Roles): Valid H1B or candidates already in the U.S.We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate...
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Senior DFT Engineer
5 days ago
bangalore, India Eximietas Design Full timeHi All,Greetings from Eximietas...Position: Senior DFT Engineers/Leads/Architects.Experience: 5-20 Years.Locations:Bengaluru, IndiaVisakhapatnam, IndiaSan Jose (Bay Area), USAAustin, USAEligibility (US Roles): Valid H1B or candidates already in the U.S.We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate...
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Senior DFT Engineer
2 weeks ago
bangalore, India Eximietas Design Full timeHi All, Greetings from Eximietas...! Position: Senior DFT Engineers/Leads/Architects. Experience: 5-20 Years. Locations: Bengaluru, India Visakhapatnam, India San Jose (Bay Area), USA Austin, USA Eligibility (US Roles): Valid H1B or candidates already in the U.S. We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An...
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Senior DFT Engineer
1 week ago
bangalore, India Eximietas Design Full timeHi All, Greetings from Eximietas...! Position: Senior DFT Engineers/Leads/Architects. Experience: 5-20 Years. Locations: Bengaluru, India Visakhapatnam, India San Jose (Bay Area), USA Austin, USA Eligibility (US Roles): Valid H1B or candidates already in the U.S. We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An...
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Senior DFT Engineer
5 days ago
bangalore, India Eximietas Design Full timeHi All, Greetings from Eximietas...! Position: Senior DFT Engineers/Leads/Architects. Experience: 5-20 Years. Locations: Bengaluru, India Visakhapatnam, India San Jose (Bay Area), USA Austin, USA Eligibility (US Roles): Valid H1B or candidates already in the U.S. We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An...
