Memory Circuit Design Engineer

21 hours ago

bangalore, India Capgemini Engineering Full time

Role: Memory Circuit Design EngineerExperience: 9 to 12 YearsLocation: PAN INDIAJob Description:Digital Full Custom CKT DesignBitcell DesignDesign of simpler memory blocks (decoding, rowdec, SA, IO block w/o RA, WA)Design of complex blocks like RA, WA, Rd selftime and write selftimeSPRAM/Dual Port/ROM architectureExploring and providing new ckt design and memory architectures – Nice to haveLibrary CKT verification at Compiler levelSense Amp Analysis(offset, pulse width, glitch, coupling etc.)"Read/Write Selftime AnalysisFunctional/Power Marginality analysisLatch analysisESPCVPower ON and power sequencing checksExtraction, IR/EM analysis, PERC etc. – Nice to haveLibrary CKT Char and Char verificationTiming, power, leak etc. setups(definitions, stimuli, MCF etc.)Timing, power, leak etc. verification (new addition)LVF analysis and implementationCritical Path Tight Stimuli (CPTS)Full Cut Tight Stimuli (FCTS)FC power, timing, power, leak and comparison with CPDecoupling CAPAgeing (char)Concept of Grid – Concept should be known; methodology can be different in diff organizationsInfrastructure, Packaging & Delivery – ST Methodology will be trained separatelyCAD Tools (More conceptual knowledge needed, tools can be different)Global BIST solutions e.g., MASIS, IR Drop solutions, AVM, RedHawk etc.Simulators e.g., XA, EldoHigh sigma analysis (eldo FFP etc.)

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