Principal DV Engineer

About Analog DevicesAnalog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at  and on LinkedIn and Twitter (X).Principal Design Verification EngineerAbout the RoleAs a Principal Design Verification Engineer at Analog Devices, you will be recognized as an in-house expert providing technical leadership in developing verification strategies for our most complex analog and mixed-signal designs. Working under consultative direction toward long-range targets, you'll architect sophisticated verification environments, mentor teams, and collaborate across organizational boundaries to ensure product quality and reliability.With minimal guidance, you'll apply deep technical expertise to solve critical verification challenges while representing ADI at industry forums and in interactions with key customers and partners. This appointment-level position involves significant influence on verification methodology adoption and technical decisions that impact crucial organizational objectives.Key ResponsibilitiesStrategic Technical Leadership: Define verification strategy and architecture for complex digital and mixed-signal designs, providing expert consultation across multiple projects and teamsVerification Innovation: Pioneer advanced verification methodologies and frameworks that drive organization-wide improvement in verification effectiveness and efficiencyCross-Organizational Influence: Drive verification decisions across organizational lines, collaborating with design teams, product managers, and executives on verification requirements and sign-off criteriaComplex Problem Resolution: Lead resolution of the most challenging verification issues requiring specialized knowledge and creative solutionsTechnical Mentorship: Develop talent across the organization by mentoring verification engineers at all levels and establishing verification methodologies and best practicesIndustry Leadership: Represent ADI at industry forums, contribute to standards development, and collaborate with tool vendors to influence future verification technologiesStrategic Quality Assurance: Establish verification metrics and quality standards across product lines that ensure design accuracy and reliabilityCustomer and Partner Engagement: Act as prime technical consultant with key customers and partners on verification matters, representing ADI's technical excellenceMust Have SkillsSystemVerilog and UVM Mastery: Recognized expert-level knowledge of SystemVerilog and Universal Verification Methodology for architecting sophisticated verification environments for the most complex designsVerification Strategy and Architecture: Exceptional ability to develop comprehensive verification strategies that drive coverage-driven methodologies and verification closure across multiple product linesMixed-Signal Verification Expertise: Deep understanding of mixed-signal design principles and verification methodologies, with proven ability to implement innovative verification approaches for complex designsAdvanced Debugging Mastery: Superior debugging skills across multiple design abstractions, with demonstrated ability to solve the most complex verification challengesVerification Methodology Innovation: Proven track record of developing and implementing new verification methodologies that advance the state of the artTechnical Leadership and Influence: Demonstrated ability to influence verification direction across the organization, mentor engineering teams, and drive methodology adoption through technical expertiseStrategic Problem Solving: Advanced analytical capabilities to identify and solve unusually significant verification challenges with high impact across product linesPreferred Education and ExperienceMaster's degree or PhD in Electrical Engineering, Computer Engineering, or related field10+ years of relevant verification experience with complex digital and mixed-signal designsExperience leading verification teams and/or major verification initiativesWhy You'll Love Working HereAt Analog Devices, you'll be part of a collaborative and innovative team that's shaping the future of technology. We offer a supportive environment focused on professional growth, competitive compensation and benefits, work-life balance, and the opportunity to work on cutting-edge projects that make a real impact on the world.Your expertise will shape the future of technology, and you'll be supported by a culture that values continuous advancement and professional growth. Join us and help create the technologies that bridge the physical and digital worlds, making a tangible difference in how people live, work, and connect.For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days