UST | Analog Layout Engineer | bangalore

1 month ago

bangalore, India UST Full time
  • To develop advanced AMS IPs like PLL and Oscillator design in differentiated sub-micron technologies like 40nm, 65nm, 28n. The ideal candidate will have a strong background in analog and mixed-signal circuit design, with a specific focus on Phase-Locked Loops (PLL) and oscillators. This role is to develop and implement high-performance PLL and oscillator solutions for various applications, ensuring reliability and precision.
  • Developing schematics for PLL: Design, simulate, and verify PLL circuits, including phase detectors, charge pumps, loop filters, voltage-controlled oscillators (VCOs), and frequency dividers.
  • Should have worked on multiple generation of technologies.
  • Should have independently PLL building blocks.
  • Including the complete validation and verification of all the specifications
  • Exposure to all stages of the design cycle: initial concept, specification, implementation and testing, documentation and support
  • Should have the capability to advise the layout designer with the implementation requirements
  • Run simulations and do post layout verifications including reliability simulations.
  • Should have the ability to understand the specifications and do the required circuit modifications to achieve them in a timely manner
  • Ability to make trade-offs between power, performance and area appropriately to meet the specifications
  • Should be able to handle the project with minimal support.


Interested candidates share your resume to sheetal.mishra@ust.com

Location: Noida/ Bangalore

Exp: 4+ years

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