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STA Engineer, Senior

2 months ago

hyderabad, India Qualcomm Full time


Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

·Experience with Synthesis, constraints, Formal Verification and STA.

·Good Domain Knowledge on RTL Design, implementation, and Timing analysis.

·Exposure in scripting (Pearl/Python/TCL).

·IO timing sta reporting and signoff.

·Peripheral protocols like spi,i3c,i2c,sdcc/emmc etc

·Strong debugging capabilities at Synthesis, timing analysis & implementation.

·Collaborate closely with cross-function team to research, design and implement performance, constraints and power management strategy for product roadmap.

·Good team player. Need to interact with the other teams/verification engineers proactively.

·Ability to debug and solve issues independently.

·STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs.

·Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus.

·Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation.

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