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Senior Analog Designer

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moradabad, India beBeeAnalogEngineer Full time

Job Title: High-Speed Analog EngineerThis is a challenging role that requires a highly skilled and experienced engineer to work on the development of high-speed analog chips in advanced TSMC 5nm technology.The successful candidate will be responsible for delivering complex high-speed analog and mixed-signal layout blocks with minimal supervision. This demands deep technical expertise in chip-level integration, bump planning, and ESD implementation, along with a good understanding of circuit simulation concepts.The engineer will work closely with SoC, Circuit, and Digital teams to ensure robust layout quality and performance. They will also be responsible for handling chip-level planning and integration of high-speed analog IPs, performing complete analog layout design, running post-layout simulations, and ensuring correlation with schematic.Key Responsibilities:Chip-level planning and integration of high-speed analog IPsComplete analog layout design including floorplanning, routing, matching, shielding, EM/IR checks, and parasitic optimizationRunning post-layout simulations (extracted netlist, corners, Monte Carlo) and ensuring correlation with schematicStrong understanding of ICC2 flows for complete SoC/top-level integrationLeading IP verification, including DRC, LVS, ERC, ANT, PEX, and reliability checksDriving complete IP signoff ownership, ensuring zero violations at final GDS deliveryWorking closely with foundry teams for PDK clarifications, LVS/DRC rule updates, model issues and PEX rule discussions, tape-out requirements and signoff guidelinesRequirements:8+ years of solid experience in Analog/Mixed-Signal LayoutDeep expertise in high-speed IPs (SERDES, PLL, ADC/DAC, Tx/Rx, clocking blocks)Strong understanding of chip-level integration, hierarchy, and physical interfacesHands-on experience with ICC2 and top-level integration flowsAbility to run simulations for the blocks being designed (post-layout, extracted)Very detailed understanding of IP-level verification, DRC/LVS/ERC, PEX/RC extraction, signoff decks & reliability checksProven experience interacting with foundry teams for rule clarifications and IP/tape-out signoffExcellent command of Cadence Virtuoso, PVS, Calibre, and extraction toolsAbout the Company:We are a cutting-edge company that specializes in developing high-speed analog chips using advanced technologies. We offer a dynamic and challenging work environment that encourages innovation and creativity.