BITSILICA | Senior Simulation Engineer | bangalore

Hi All,We have an excellent opportunity #Bitsilica #BangaloreLooking for an Experienced Robotics Engineer to design robotics devices software and applications. Deep knowledge in robotics, machine vision, automation concepts, computer systems and exceptional programming skill.Responsibilities1. Design and develop industrial robotics2. Understanding Fleet...

Hi All,We have an excellent opportunity #Bitsilica #BangaloreLooking for an Experienced Robotics Engineer to design robotics devices software and applications. Deep knowledge in robotics, machine vision, automation concepts, computer systems and exceptional programming skill.Responsibilities1. Design and develop industrial robotics2. Understanding Fleet...

Hi All, We have an excellent opportunity #Bitsilica #Bangalore Looking for an Experienced Robotics Engineer to design robotics devices software and applications. Deep knowledge in robotics, machine vision, automation concepts, computer systems and exceptional programming skill. Responsibilities 1. Design and develop industrial robotics 2. Understanding Fleet...

About the Company Bitsilica is a company that specializes in physical design implementation of large ASIC’s. Our mission is to provide cutting-edge solutions in the semiconductor industry while fostering a culture of innovation and collaboration. About the Role We are looking for a candidate with relevant work experience in physical design implementation...

About the Company Bitsilica is a company that specializes in physical design implementation of large ASIC’s. Our mission is to provide cutting-edge solutions in the semiconductor industry while fostering a culture of innovation and collaboration.About the Role We are looking for a candidate with relevant work experience in physical design implementation of...

Location: BengaluruExperience: 2+yrsJob Description:LIB timing file generationVerilog ModellingAnalog design characterization - familiarity with Cadence spectre and Synopsys HspiceAdditional help with Analog Quality ChecksEM/IR simulationPlease share your profile to

Location: Bengaluru Experience: 2+yrs Job Description: LIB timing file generation Verilog Modelling Analog design characterization - familiarity with Cadence spectre and Synopsys Hspice Additional help with Analog Quality Checks EM/IR simulation Please share your profile to

RTL - Bangalore and Noida 7+ year experience candidate with following criteria Expertise and hands on experience in Verilog/RTL design for IP or SoC. Command and thorough knowledge on digital logic design concepts. Must have worked on at least one large IP block and have in depth knowledge of IP block design/architecture. Must have experience in...

RTL - Bangalore and Noida7+ year experience candidate with following criteriaExpertise and hands on experience in Verilog/RTL design for IP or SoC.Command and thorough knowledge on digital logic design concepts.Must have worked on at least one large IP block and have in depth knowledge of IP block design/architecture.Must have experience in...

RTL - Bangalore and Noida7+ year experience candidate with following criteriaExpertise and hands on experience in Verilog/RTL design for IP or SoC.Command and thorough knowledge on digital logic design concepts.Must have worked on at least one large IP block and have in depth knowledge of IP block design/architecture.Must have experience in...

About the Role - Lead AMS IP/chip verification, including reviewing design specifications and defining and executing a verification plan to ensure compliance with specifications. Architect, implement, and automate analog, digital, and AMS test benches to verify pre-silicon designs. Build System Verilog real number analog behavioral models, monitors, and...

About the Company Bitsilica is a company that specializes in physical design implementation of large ASIC’s. Our mission is to provide cutting-edge solutions in the semiconductor industry while fostering a culture of innovation and collaboration. About the Role We are looking for a candidate with relevant work experience in physical design...

Need resource with the following skills: · .LIB timing file generation · Verilog Modelling · Analog design characterization - familiarity with Cadens spectre and Synopys Hspice · Additional help with Analog Quality Checks : o EM/IR simulation

Email me - Over 5 years of digital IP verification, advanced knowledge of ASIC/SOC Design flow and state of the art verification flow Proficient with Verilog, System Verilog and UVM. · Good in UVM concepts and SystemVerilog language. (SVA, UVM scoreboard) · Good in defining and developing UVM based verification frameworks, testbenches, processes and...

Hello Connections, We are currently Hiring Senior Physical Verification Engineers - 5+yrs Location: Bengaluru Availability - Immediate to 20 Days Job Description: 1.Experience on PV closure and tape out for 7ff or below tech node. 2.Good understanding of advance design rule and fixes 3.Experience in Calibre and Innovus is mandatory 4.Block level PV closure...

Hello Connections,We are currently Hiring Senior Physical Verification Engineers - 5+yrs Location: BengaluruAvailability - Immediate to 20 Days Job Description:1.Experience on PV closure and tape out for 7ff or below tech node.2.Good understanding of advance design rule and fixes3.Experience in Calibre and Innovus is mandatory4.Block level PV closure at...

Location: Bengaluru/Bangalore Experience: 3yrs to 10 yrs Notice Period: Immediate to 30 Days Job Description: • 3 to 8 years' experience in analog/custom layout design in advanced CMOS process, in various technology nodes (16nm to 130nm ) • Expertise in Cadence GXL / XL and Mentor Graphic Calibre DRC / LVS / PEX is a must. • Should have hands on...

Skill: AnalogLayout Engineer Qualification: M.Tech 2023, 2022, 2021, 2020 B.Tech 2023,2022, 2021, 2020, 2019 Location: Bengaluru

Excellent opportunity for experienced engineers Mandatory Skills: Location-Bangalore Engineer with 6+ years of experience in Android Framework /HAL/ driver development (2 positions – 6 to 8 Yrs, 2 positions – 8 to 10 Yrs, 2 positions – 10+ Yrs) Strong C/C++ development skills with a good understanding of object-oriented design Good understanding of...

Excellent opportunity for experienced engineersMandatory Skills:Location-BangaloreEngineer with 6+ years of experience in Android Framework /HAL/ driver development (2 positions – 6 to 8 Yrs, 2 positions – 8 to 10 Yrs, 2 positions – 10+ Yrs)Strong C/C++ development skills with a good understanding of object-oriented designGood understanding of Android...