Lead Digital Fault Engineer

1 week ago


visakhapatnam, India beBeeDigitalFault Full time

Join a team of experts as a Lead Digital Fault Engineer.Job RoleWe are seeking an experienced DFT professional to lead the implementation and verification of digital fault testing features. As part of our team, you will work closely with cross-functional teams to define and drive DFT strategy and architecture.Digital Fault Strategy and Architecture:Develop and implement DFT plans for complex ASIC and SoC designs.Define DFT requirements for multiple projects.Your Key Responsibilities:Implement scan insertion and compression (EDT).Develop and implement ATPG pattern generation and fault grading.Implement boundary scan (IEEE 1149.1/1149.6) and IJTAG (1687).What We Are Looking For:B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Design.7+ years of experience in DFT for complex ASIC or SoC designs.Hands-on experience with DFT tools such as Synopsys: DFT Compiler, TetraMAX, TestMAX, Siemens EDA: Tessent ScanPro, MBIST, IJTAG, Cadence/others: Modus, Encounter Test.Additional Qualifications:Experience with hierarchical DFT and low-power DFT methodologies (UPF).Exposure to post-silicon validation and failure analysis.Familiarity with safety-critical designs (ISO 26262) and functional safety.Experience working in advanced nodes (e.g., 7nm, 5nm, FinFET).


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