Senior Chip Static Timing Engineer

7 days ago

madurai, India beBeeStaticTiming Full time

STA Lead for Complex SoCsWe are seeking an experienced professional to drive timing closure activities for complex System-on-Chip (SoC) designs.The ideal candidate will have strong expertise in full-chip static timing analysis, constraint management, and cross-functional collaboration.The role involves handling functional and test constraints at block and top level, performing STA for block-level and full-chip sign-off, generating engineering change orders (ECOs), and coordinating with block owners for implementation.Main Responsibilities:Handling functional and test constraints at block and top levelPerforming static timing analysis (STA) for block-level and full-chip sign-offGenerating ECOs and coordinating with block owners for implementationWorking closely with synthesis teams for block-level and top-level synthesisDriving automation initiatives using scripting languages like Perl, Tcl, Awk, or PythonMentoring junior engineers on technical aspectsRequirements:8+ years of experience in full-chip STAProven expertise in constraints handling, STA sign-off, and ECO flowStrong scripting and automation skillsExcellent communication and collaboration abilitiesAbout the Role:This is a unique opportunity for a highly skilled professional to take ownership of STA activities and contribute to the success of our team.As a key member of our team, you will be responsible for driving timing closure activities, mentoring junior engineers, and working closely with synthesis teams.If you have a passion for electronics and a proven track record in STA, we encourage you to apply for this exciting opportunity.Benefits:Opportunity to work on complex SoC designsCollaborative team environmentProfessional growth and development opportunitiesCompetitive compensation and benefits packageContact Information:Please submit your application, including your resume and cover letter, to us via email. We look forward to hearing from you

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