Application Specific Integrated Circuit Design Engineer

3 weeks ago


hyderabad, India BITSILICA Full time

Location: Hyderabad

Experience: 4yrs to 15 yrs

Job Description:

Experience in Logic design / RTL coding is a must.
Experience is SoC design and integration for complex SoCs is a must.
Experience in Verilog/System-Verilogis a must.
Experience in Multi Clock designs, Asynchronous interface is a must.
Experience in using the tools in ASIC development such as Lint and CDC.
Experience in Synthesis / Understanding of timing concepts is a plus.
Experience in ECO fixes and formal verification.
Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset architecture.

Kindly share your updated CV's to afreen.malik@bitsilica.com



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