Senior Test Architecture Position

2 weeks ago

nadiad, India beBeeTestArchitect Full time

Senior Test Architect RoleWe are looking for a highly skilled test architect to spearhead the development of advanced testing methodologies and architectures for complex SoC/ASIC designs.The ideal candidate will be responsible for defining and driving DFT strategy and architecture for multiple ASIC/SoC projects, ensuring seamless integration with cross-functional teams.Key responsibilities include:Scan insertion and compression (e.g., EDT)ATPG pattern generation and fault gradingMBIST and Logic BIST insertion and validationBoundary scan (IEEE 1149.1/1149.6), IJTAG (1687)Managing end-to-end DFT flow — from RTL to gate-level netlist and silicon bring-up.Collaborating with RTL, STA, PD, and test engineering teams for successful project execution.Performing pattern generation, fault simulation, and debug test coverage gaps.Ensuring DFT signoff, timing closure (DFT-related paths), and ATE pattern delivery.Supporting silicon bring-up, test vector validation on ATE, and yield optimization.Mentoring junior test architects; conducting design reviews and training sessions.Developing and maintaining DFT automation scripts and infrastructure.A bachelor's or master's degree in Electronics, Electrical, or VLSI Design is required.Why Choose Us?This role offers the opportunity to work on cutting-edge technologies, collaborate with top talent, and drive innovation in the field of test architecture.

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