Tessolve | Senior Design Verification Engineer
3 days ago
Verification Application Engineer
Work location: Bangalore
Exp: 4 to 12yrs
Job Qualification
- BE/BTech/ME/MS/MTech in Electrical/Electronic Engineering or related field
- hands-on experience with design and verification/EDA industry
Requirements and Technical Skills
Minimum:
- Strong RTL and Testbench debug skills
- Strong HDL Design and Verification skills
- Experience with SystemVerilog, VHDL, Verilog
- Experience in high speed protocols (PCIe/CXL/Ethernet/DDR/USB/UCIe) must.
- Ability to quickly analyze verification environments and design complexity
- Strong verbal and written communication skills
- Ability to interact effectively with both external customers and R&D teams
Preferred:
- Familiarity with Code and Functional coverage
- Familiarity with Low Power Verification
- Familiarity with Gate level simulation
- Familiarity with Formal Verification
- Familiarity with C / C++ / SystemC, UVM
- Familiarity with scripting languages (Perl, Python or Tcl)
Job Responsibilities
- Help the customers in the increase of productivity, debug complex issues and provide solutions in the implementation of their Design and Verification flows.
- Working closely with R&D and Engineering to identify and prioritize the product improvement initiatives through formal methods and help in the customer adoption.
- Consult and understand the innovative design needs from customers and communicate with internal teams
- Creating high impact knowledge article content, tool adoption kits and other high-level documents to increase the self-help of customers
- Establish technical credibility and rapport with the customer and become the go-to expert for all their technical inquiries and support
- Champion the customer needs and work closely with R&D and marketing to develop competitive and creative technical solutions
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