Senior DFT Engineer
1 week ago
Change the world. Love your job. TI offers one of the world's largest portfolio of power management and delivery for CPU and GPU Servers, personal electronics and automotive. Our team has full product development responsibility from definition till releasing products to market for enterprise power delivery. We take pride in pushing the boundaries on innovation & executing ideas into winning products. Our team spans the entire spectrum of Systems and IP Specifications, System Level Simulations, Micro-Architecture Definition, Low Power Low Latency Architectures, IP Development, Advanced DFT, Formal Verification, Physical Design, Test, Validation and Application Engineering. We have a strong system that fosters technical innovations, publications and knowledge sharing. Our people-centric approach encourages collaboration, mentoring, multiskilling, domain rotation and ownership leading to accelerated career growth and an engaging working environment.We are now looking for talented Design for Test engineers for multi-million gate controller ASICs.Minimum Requirement3-5 years of relevant industry experience of which 2+ yr should be in chip/IP level DFT implementation.JTAG protocol basics.Understanding of DFT & ATPG concepts & best practices: Clock gating/bypass, Reset Bypass, Scan Collar, Clock Shaping, Fault models, Pattern Generation, Coverage, Debug and Closure of Coverage Gaps.Hands on experience in synthesis and scan stitching, scan chain integrity checks and test point insertion, scan architectures, clock generation architecture for at-speed tests with industry tools in a must. Cadence toolchain is preferred (Modus, Genus, Xcelium)Scripting in Tcl, Python/Perl/CStrong analytical and debugging skillsBachelor's degree in Electrical/Electronic Engineering or related fieldThorough understanding of digital logic design with Verilog/ System VerilogPreferred QualificationsExperience in full-chip level DFT implementationMemory testing concepts: basics of memory testing algorithms, test architectures.Experience in ATE debug will be a plusLEC constraining for DFT.STA concept, DFT for multiple clock domainsDebugging of mis-compares during pattern simulation.Experience in IP design and/or verification would be a plusMaster’s degree in Electrical/Electronic Engineering or related field
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Senior DFT Engineer
2 weeks ago
bangalore, India L&T Technology Services Full timeL&T Technology is hiring for Senior DFT Engineers / Lead DFT Engineer with 8-15 Years of experience. Job Location : Bangalore Skills Expertise should be : ATPG, SOC, ASIC DFT.
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Senior DFT Engineer
17 hours ago
bangalore, India L&T Technology Services Full timeL&T Technology is hiring for Senior DFT Engineers / Lead DFT Engineer with 8-15 Years of experience. Job Location : Bangalore Skills Expertise should be : ATPG, SOC, ASIC DFT.
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Dft engineer
4 weeks ago
Bangalore, India Angel And Genie Full timeRole: DFT Engineer Location: Bangalore (work from office) Experience: 5+ years Job Description We are looking for an energetic, passionate and process oriented DFT Engineers who has extensive experience in planning, implementation and verification of DFT features for multiple So C. Direct Responsibilities of the role, but not limited to, working on...
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DFT Engineer
5 days ago
bangalore, India Ms Angel and Genie (Talent Search Company) Full timeJob DescriptionWe are looking for an energetic, passionate and process oriented DFT Engineers who has extensive experience in planning, implementation and verification of DFT features for multiple SoC.Direct Responsibilities of the role, but not limited to,working on various aspects of IP and SoC DFT including the DFT Architecture, Spyglass DFT, RTL...
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Dft engineer
4 weeks ago
Bangalore, India Ms Angel And Genie Full timeJob Description We are looking for an energetic, passionate and process oriented DFT Engineers who has extensive experience in planning, implementation and verification of DFT features for multiple So C. Direct Responsibilities of the role, but not limited to, working on various aspects of IP and So C DFT including the DFT Architecture, Spyglass DFT, RTL...
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Dft engineer
2 weeks ago
Bangalore, India Ms Angel And Genie Full timeJob Description We are looking for an energetic, passionate and process oriented DFT Engineers who has extensive experience in planning, implementation and verification of DFT features for multiple So C. Direct Responsibilities of the role, but not limited to, working on various aspects of IP and So C DFT including the DFT Architecture, Spyglass DFT, RTL...
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Dft engineer
2 weeks ago
Bangalore, India Ms Angel And Genie Full timeJob Description We are looking for an energetic, passionate and process oriented DFT Engineers who has extensive experience in planning, implementation and verification of DFT features for multiple So C. Direct Responsibilities of the role, but not limited to, working on various aspects of IP and So C DFT including the DFT Architecture, Spyglass DFT, RTL...
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DFT Engineer
1 week ago
Bangalore, India Ms Angel and Genie (Talent Search Company) Full timeJob Description We are looking for an energetic, passionate and process oriented DFT Engineers who has extensive experience in planning, implementation and verification of DFT features for multiple SoC. Direct Responsibilities of the role, but not limited to, working on various aspects of IP and SoC DFT including the DFT Architecture, Spyglass DFT, RTL...
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Senior DFT Engineer
1 week ago
bangalore, India Texas Instruments Full timeChange the world. Love your job. TI offers one of the world's largest portfolio of power management and delivery for CPU and GPU Servers, personal electronics and automotive. Our team has full product development responsibility from definition till releasing products to market for enterprise power delivery. We take pride in pushing the boundaries on...
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DFT Engineer
3 weeks ago
Bangalore Urban, India Globex Digital Full timeJob Title :DFT Engineer/Senior Engineer/ Lead Engineer/DFT Architect Experience : 4years to 12yrs Location : Bangalore, Hyderabad, Kochi, Pune Key Responsibilities: Interface with ASIC design teams to ensure DFT design rules and coverages are met. Generate high-quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models...
