BITSILICA | Engineer
2 days ago
Hiring for STA Engineer
4+ years of experience in STA at IP or SoC level using Primetime
- Must be good in scripting, primarily tcl
- Good understanding of Hardmacro development cycle and STA collaterals
- Experience in DDR IP development, SerDes IP Development and Testchip development is a plus
- Must be good in digital design concepts and understanding of structural veilog
- Should be good in communication
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india BITSILICA Full timeBITSILICA is hiring experienced professionals for the below position.Experience: 5 to 8 years.Location: Bangalore.Skills Required:Excellent Python programming skills with proven experience of writing test software to validate product usecases at a system and unit test level. Extensive on-chip application validation experience with a clear understanding of...
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india BITSILICA Full timeBITSILICA is hiring experienced professionals for the below position. Experience: 5 to 8 years. Location: Bangalore. Skills Required: Excellent Python programming skills with proven experience of writing test software to validate product usecases at a system and unit test level. Extensive on-chip application validation experience with a clear...
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india BITSILICA Full timeBITSILICA is hiring experienced professionals for the below position. Experience: 5 to 8 years. Location: Bangalore. Skills Required: Excellent Python programming skills with proven experience of writing test software to validate product usecases at a system and unit test level. Extensive on-chip application validation experience with a clear...
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BITSILICA | Engineer | india
2 days ago
india BITSILICA Full timeHiring for STA Engineer 4+ years of experience in STA at IP or SoC level using Primetime - Must be good in scripting, primarily tcl - Good understanding of Hardmacro development cycle and STA collaterals - Experience in DDR IP development, SerDes IP Development and Testchip development is a plus - Must be good in digital design concepts and understanding of...
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BITSILICA | Engineer | india
2 days ago
india BITSILICA Full timeHiring for STA Engineer 4+ years of experience in STA at IP or SoC level using Primetime - Must be good in scripting, primarily tcl - Good understanding of Hardmacro development cycle and STA collaterals - Experience in DDR IP development, SerDes IP Development and Testchip development is a plus - Must be good in digital design concepts and understanding of...
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India BITSILICA Full time**Company Overview:** BITSILICA is a renowned provider of innovative solutions in the field of digital design.We are seeking an exceptional STA Engineer to join our team, focusing on designing and developing complex digital systems.**Estimated Salary Range:** ₹1,500,000 - ₹2,500,000 per annum, commensurate with experience.**Job Description:**As a Senior...
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india BITSILICA Full timeAbout the Role - Lead AMS IP/chip verification, including reviewing design specifications and defining and executing a verification plan to ensure compliance with specifications.Architect, implement, and automate analog, digital, and AMS test benches to verify pre-silicon designs. Build System Verilog real number analog behavioral models, monitors, and...
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Senior Embedded Validation Engineer
2 days ago
India BITSILICA Full timeBITSILICA is hiring experienced professionals for the below position. Experience: 5 to 8 years. Location: Bangalore. Skills Required: Excellent Python programming skills with proven experience of writing test software to validate product usecases at a system and unit test level. Extensive on-chip application validation experience with a...
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BITSILICA | Senior Design Engineer | india
1 month ago
india BITSILICA Full timeNeed resource with the following skills: · .LIB timing file generation · Verilog Modelling · Analog design characterization - familiarity with Cadens spectre and Synopys Hspice · Additional help with Analog Quality Checks : EM/IR simulation
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india BITSILICA Full timeOver 8 years of digital IP verification, advanced knowledge of ASIC/SOC Design flow and state of the art verification flow Proficient with Verilog, System Verilog and UVM. · Good in UVM concepts and SystemVerilog language. (SVA, UVM scoreboard) · Good in defining and developing UVM based verification frameworks, testbenches, processes and flows. · Good in...
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AMS Verification Engineers
6 days ago
India BITSILICA Full timeAbout the Role - Lead AMS IP/chip verification, including reviewing design specifications and defining and executing a verification plan to ensure compliance with specifications. Architect, implement, and automate analog, digital, and AMS test benches to verify pre-silicon designs. Build System Verilog real number analog behavioral models, monitors,...
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India BITSILICA Full timeAbout the RoleWe are seeking an experienced Electrical Engineer to lead our Analog and Mixed Signal (AMS) verification efforts. As a key member of our team, you will be responsible for reviewing design specifications, developing verification plans, and executing them to ensure compliance with specifications.Responsibilities include:Leading AMS IP/chip...
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Senior Design Engineer
1 month ago
india BITSILICA Full timeNeed resource with the following skills:· .LIB timing file generation· Verilog Modelling· Analog design characterization - familiarity with Cadens spectre and Synopys Hspice· Additional help with Analog Quality Checks :EM/IR simulation
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Senior Design Verification Engineer
1 month ago
india BITSILICA Full timeOver 8 years of digital IP verification, advanced knowledge of ASIC/SOC Design flow and state of the art verification flowProficient with Verilog, System Verilog and UVM.· Good in UVM concepts and SystemVerilog language. (SVA, UVM scoreboard)· Good in defining and developing UVM based verification frameworks, testbenches, processes and flows.· Good in...
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RTL Design
2 months ago
india BITSILICA Full timeWe are currently seeking experienced RTL Engineers - Minimum 4 years of experience required - Proficiency in RTL development from micro-architecture - Expertise in SoC, Memory, Peripheral, Security, and Cache IP’s Analysis & Integration - Skilled in RTL Quality checks including VCS, synthesis checks, LINT, LEC, CDC - Strong background in Failures Debug/Bug...
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RTL Design
2 months ago
india BITSILICA Full timeWe are currently seeking experienced RTL Engineers- Minimum 4 years of experience required- Proficiency in RTL development from micro-architecture- Expertise in SoC, Memory, Peripheral, Security, and Cache IP’s Analysis & Integration- Skilled in RTL Quality checks including VCS, synthesis checks, LINT, LEC, CDC- Strong background in Failures Debug/Bug...