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Staff design engineer
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Staff Engineer – ASIC Digital Design
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Staff Engineer – ASIC Digital Design
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Staff Engineer – ASIC Digital Design
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Digital designer
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Bangalore, India Live Connections Full timeDigital Designer Location: Chennai or Bangalore (Hybrid) Shift: Flexible to work in US & UK NP: Only Immediate joiners Mode: Full time With at least 4 years+ of hands-on experience working on Digital design gained in a digital/creative agency environment, creating Designs across multiple online medias, the designer will be producing online...
Staff Digital Design Engg
2 months ago
OnSemi is seeking a Staff Digital design, NEW PRODUCT DEVELOPMENT, Power Management, to join our growing team in Bengaluru, India. This group is responsible for development of Power management products including DC-DC PMIC/POL, Multiphase controllers, AC-DC converters, LED drivers, SiC drivers, Switches and efuses for consumer, industrial and automotive applications. In this role, you will focus on the following:
Work with different product lines for RTL implementation of power convertor controller design like AC-DC control loops, power driver digital controls for LED/SiC FET application, peripherals like I2C, SPI, LIN, CAN protocols The candidate will work on digital design architecture implementation, low power design, synthesis and timing analysis, Physical Design interface for the power management chips using state of the art RTL2GDS flows for IPs and full chip design Implement Digital On Top (DOT) for SoC design using sub-system IPs and analog IPs. The candidate will be able to work as part of a large and focused team of engineers and will be able to collaborate successfully as needed with design architects, digital verification, project management, and digital and analog design teams in multiple worldwide geographies Implement micro-architecture to RTL implementation with the refining of features requirements throughout the design process Works with validation team for pre-silicon platforms like SOCV, Emulation, FPGA. Owns technical outcome of design, verification, implementation, and execution of Power Management ICs with complexities that can span from simple power convertors to complex designs, control loops, and digital interfaces Understand project goals, execute with realistic schedule, report status of progress and understand clarity of project details and milestones Get involved in Customer issues, production issues, FW and System development, Failure Analysis Support post-silicon validation activities for your designs#LI-RG1
Work with different product lines for RTL implementation of power convertor controller design like AC-DC control loops, power driver digital controls for LED/SiC FET application, peripherals like I2C, SPI, LIN, CAN protocols The candidate will work on digital design architecture implementation, low power design, synthesis and timing analysis, Physical Design interface for the power management chips using state of the art RTL2GDS flows for IPs and full chip design Implement Digital On Top (DOT) for SoC design using sub-system IPs and analog IPs. The candidate will be able to work as part of a large and focused team of engineers and will be able to collaborate successfully as needed with design architects, digital verification, project management, and digital and analog design teams in multiple worldwide geographies Implement micro-architecture to RTL implementation with the refining of features requirements throughout the design process Works with validation team for pre-silicon platforms like SOCV, Emulation, FPGA. Owns technical outcome of design, verification, implementation, and execution of Power Management ICs with complexities that can span from simple power convertors to complex designs, control loops, and digital interfaces Understand project goals, execute with realistic schedule, report status of progress and understand clarity of project details and milestones Get involved in Customer issues, production issues, FW and System development, Failure Analysis Support post-silicon validation activities for your designs#LI-RG1
BS in Electrical Engineering or related + 9 years of experience, or MS + 7 years of experience in working and leading Digital Design, Architecture and ASIC/Mixed signal chip developments The ideal candidate should have thorough understanding of the end-to-end digital design flow in order to accurately and efficiently collaborate with all members of the technical staff, both analog and digital, regarding overall project development progress and status Solid understanding of RTL design, CDC, ASIC synthesis, timing analysis and CDC, P&R, UPF, ATPG generation and system Verilog (assertion) Solid understanding of Verilog, TCL and Perl/Python/XML programming languages Experience in developing ASIC/Mixed signal ICs for various Power Converters such as multiphase converter, DC-DC PMIC/POL, AC-DC converters, LED/SiC, Motor/MOSFET drivers#LI-RG1