Memory Interface Verification Specialist

Job DescriptionDefine and implement verification strategies and test plans for DDR memory interface designs.Develop UVM/SystemVerilog-based testbenches and reusable verification components.Perform protocol-level verification for DDR memory interfaces and validate compliance.Collaborate with architecture, RTL, and system teams to understand design intent and...

Job OverviewWe are seeking an experienced engineer to join our team as a System Verilog Verification Specialist. The successful candidate will be responsible for developing and executing testbenches to validate the functionality and correctness of models, participating in system-level testing and debugging, and bringing up simulations with various...

VerificationLocation: HyderabadJob Description:Must have good knowledge on the verification flowsExcellent hands-on debug skills and problem solving attitude.Experience of working in complex test-bench/model in Verilog, System Verilog or SystemCExperience of working on Functional Verification, SoC Verification, EmulationGood in programming : System Verilog,...

Job Title : Senior Design Verification Engineer CPU & SoC VerificationLocation : Bangalore /HyderabadExperience : 4 10 YearsJob Type : Full-timeEducation : B.E./B.Tech/M.E./M.Tech in Electronics, Electrical, or Computer Engineering.Job Summary : We are seeking an experienced Senior Design Verification Engineer with strong expertise in CPU and SoC-level...

Experience: 5 YearsLocation: Bangalore/HyderabadEducation: B. E/B. Tech in ECE/EEE or M. E/M. Tech in VLSI/ElectronicsRoles and ResponsibilitiesDDR Verification: Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols.Testbench Development: Develop...

Experience: 5 YearsLocation: Bangalore/HyderabadEducation: B.E/B.Tech in ECE/EEE or M.E/M.Tech in VLSI/ElectronicsRoles and ResponsibilitiesDDR Verification: Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols.Testbench Development: Develop and...

Experience: 5 YearsLocation: Bangalore/HyderabadEducation: B. E/B. Tech in ECE/EEE or M. E/M. Tech in VLSI/ElectronicsRoles and ResponsibilitiesDDR Verification: Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols.Testbench Development: Develop...

Experience: 5 YearsLocation: Bangalore/HyderabadEducation: B.E/B.Tech in ECE/EEE or M.E/M.Tech in VLSI/ElectronicsRoles and ResponsibilitiesDDR Verification: Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols.Testbench Development: Develop and...

Hello Connections,Greetings from ElevarSoCWe are hiring for Memory Layout Engineer with 3+Years of Experience for Banglaore location.hashtag#BangaloreImmediate / 2 weeks preferredhashtag#Below the jdTechnical Skill:Experience in Memory/Custom Layout design.Memory Leafcell layout library design from scratch including top level integration.Good knowledge on...

Experience: 5 Years Location: Bangalore/Hyderabad Education: B.E/B.Tech in ECE/EEE or M.E/M.Tech in VLSI/Electronics Roles and Responsibilities DDR Verification: Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols. Testbench Development: Develop...