ASIC Digital Design(PHY IP)
1 month ago
Client of Connectpro
Exp-6+yrs exp
- To be part of a highly skilled and challenging high speed parallel #PHY such as #DDR, #LPDDR etc design team.
- Design and develop high speed interface PHY and its sub-block such as high speed data paths, analog calibration, training, IP initialization, low power control, test, loopback etc
- Responsible for various aspects of design and verification from spec to silicon along with interface design for controller and SoC.
- Active involvement in problem solving and implementing opportunities for improvement
- Mentoring and coaching other design team members on technical issues
- Pair with Analog designers to ensure smooth interface between Digital and Analog circuits
- Equal opportunity position with excellent pay package
SKILLS required:
- Strong fundamental knowledge of digital design, Verilog and scripting languages
- Experience with micro-architecture and Asynchronous digital designs
- Working knowledge of Synthesis, STA, Lint & CDC
- Working knowledge of DDR/LPDDR JEDEC protocol and DDR PHY designs
- Experience with DDR training algorithms and data path designs
- Experience in domain transfer designs, APB/JTAG, DFI
- M.S./M.Tech, BS/BE (Electronics)
Experience Required : 7+ Years
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ASIC Digital Design(PHY IP)
2 months ago
Bangalore, India ConnectPRO Full timeClient of Connectpro Exp-6+yrs exp To be part of a highly skilled and challenging high speed parallel # PHY such as # DDR, #LPDDR etc design team. Design and develop high speed interface PHY and its sub-block such as high speed data paths, analog calibration, training, IP initialization, low power control, test, loopback etc Responsible for various...
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ASIC Digital Design(PHY IP)
2 months ago
bangalore, India ConnectPRO Full timeClient of ConnectproExp-6+yrs expTo be part of a highly skilled and challenging high speed parallel #PHY such as #DDR, #LPDDR etc design team.Design and develop high speed interface PHY and its sub-block such as high speed data paths, analog calibration, training, IP initialization, low power control, test, loopback etcResponsible for various aspects of...
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Senior Manager – ASIC Digital Design
2 weeks ago
Bangalore Urban, India Client of Connectpro Full timeSenior Manager – ASIC Digital Design having 15 to 25yrs expExperience in end of end ownership of digital design of at least one of the ONFI, DDR , LPDDR, MIPI or PCIe PHY IP from specifications to siliconExperience of silicon bring and debug of aforesaid IPsExperience of leading and guiding a team of digital designers and collaborating with verification...
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bangalore, India Client of Connectpro Full timeSenior Manager – ASIC Digital Design having 15 to 25yrs expExperience in end of end ownership of digital design of at least one of the ONFI, DDR , LPDDR, MIPI or PCIe PHY IP from specifications to siliconExperience of silicon bring and debug of aforesaid IPsExperience of leading and guiding a team of digital designers and collaborating with verification...
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bangalore, India Client of Connectpro Full timeSenior Manager – ASIC Digital Design having 15 to 25yrs exp Experience in end of end ownership of digital design of at least one of the ONFI, DDR , LPDDR, MIPI or PCIe PHY IP from specifications to silicon Experience of silicon bring and debug of aforesaid IPs Experience of leading and guiding a team of digital designers and collaborating with...
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bangalore, India Client of Connectpro Full timeSenior Manager – ASIC Digital Design having 15 to 25yrs expExperience in end of end ownership of digital design of at least one of the ONFI, DDR , LPDDR, MIPI or PCIe PHY IP from specifications to siliconExperience of silicon bring and debug of aforesaid IPsExperience of leading and guiding a team of digital designers and collaborating with verification...
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