Only 24h Left Senior RTL engineer

Role DescriptionThis is a full-time on-site role for a Senior RTL Design Engineer located in Bengaluru. The Senior RTL Design Engineer will be responsible for the design and implementation of digital circuits, developing and verifying RTL (Register-Transfer Level) designs, and collaborating with cross-functional teams to ensure accurate and efficient design...

NOTE- Looking for more than 7+ yrs of experience only.Job Description for RTLWe are hiring a SoC Integration Engineer with strong expertise in RTL coding and SoC integration flows. The ideal candidate should have hands-on experience with SpyGlass Lint, CDC, DC Synthesis, and VCLSP, along with scripting knowledge.Key Responsibilities:Integrate IP blocks into...

LLTS is looking to hire for RTL design engineers with 6+ years of experience with below skills set ::RTL Design Engineer with 6+ of Hands on experiences. • Experience/proficiency in RTL design(Verilog/VHDL) architecture implementation using (coding in) hardware description (RTL) , IP Design, SoC Design and Integration • Should have hands on experience in...

Job InformationJob Opening IDZR_174_JOBIndustrySemiconductorDate Opened09/10/2025Job TypeFull timeWork Experience8+ YearsCityBangaloreState/ProvinceKarnatakaCountryIndiaZip/Postal Code560078Job DescriptionSummary:Own end-to-end RTL design for complex SoC or large subsystem blocks, from micro-architecture through tapeout and silicon...

Skill-RTLExp=5-10 yearsLocation-Bangalore/HydBUDGET-11 LPAClient - WIPROJD of Senior ASIC/SoC RTL Engineer/Lead – 5-15yrs1)   Expertise in SoC subsystem/IP design2)   Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog3)   In depth knowledge on RTL quality checks (Lint, CDC)4)   Knowledge of...

Summary:Own end-to-end RTL design for complex SoC or large subsystem blocks, from micro-architecture through tapeout and silicon bring-up.Responsibilities:Define micro-architecture from specs; write high-quality synthesizable SystemVerilog/Verilog RTL for SoC-level or large subsystems.Own design bring-up, block/subsystem integration, and close on timing,...

Job Description for RTLWe are hiring a SoC Integration Engineer with strong expertise in RTL coding and SoC integration flows. The ideal candidate should have hands-on experience with SpyGlass Lint, CDC, DC Synthesis, and VCLSP, along with scripting knowledge.Key Responsibilities:Integrate IP blocks into SoC at RTL levelPerform RTL coding and...

Summary:We are looking for an experienced Senior/Principal ASIC RTL Design Engineer with 10+ years of hands-on RTL design expertise to join our team in Bangalore. The ideal candidate will own end-to-end RTL design for complex SoCs or large subsystems, from micro-architecture through tapeout and silicon bring-up.Job Description:Own RTL design of SoC-level or...

Opportunity With Tessolve Semiconductor- BangaloreHi All,we are hiring RTL design engineer and design verification engineer for Bangalore location.Exp: 5+ yr expSkills: RTL ASIC, CDC, Lint, Synthesis, SpyglassWe are hiring for RTL ASIC engineer7f work experience in ASIC/IP Design.Experience in Logic design / RTL designExperience is IP design and...

Job Opportunity: RTL to GDSII Engineer (5+ Years of Experience)Location:BangaloreNotice Period:Immediate to 15 DaysWe are seeking experiencedRTL to GDSII Engineerswith a minimum of5 years of relevant experienceto join our team in Bangalore. The ideal candidate will possess strong technical expertise in synthesis and timing analysis, with hands-on experience...