
Design Verification Engineer
3 weeks ago
Duration: 1 year contract
Location: 100% remote - anywhere from India
Job Opening: Design Verification Engineer
🕒 Work Hours: 2 PM – 11 PM or 3 PM – 12 Midnight IST (to support USA team)
📄 Contract Duration: 1 Year
💰 Compensation: As per market standards
Experience Required: 7+ years
Role Overview:
We are seeking a skilled Design Verification Engineer to join our team on a contract basis. The ideal candidate should have strong expertise in Verification, UVM, Verilog and DDR DV, with hands-on experience in high-speed I/O protocols such as DDR, PCIe, UFS, and SerDes.
Key Requirements:
Strong background in Design Verification
Proficiency in UVM methodology
Experience with DDR DV
Good understanding of high-speed I/O protocols (DDR/PCIe/UFS/SerDes, etc.)
Excellent problem-solving and debugging skills
Ability to coordinate and collaborate with USA-based teams
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