10/08/2025) DFT LEAD Engineer

4 weeks ago

Bengaluru, Karnataka, India Arm Full time
Job Overview

Arm's DFT methodology team works on DFT flows and methodology for projects, including soft IP, hard macros, SOCs and physical library IP across all the Arm design sites. In addition, this team builds and drives DFT methodology and flows throughout all of Arm and works to get support from EDA vendors to support our methodologies.

Responsibilities:

Support DFT on multiple types of projects in multiple design centers and apply innovative DFT techniques and affect the content of forthcoming CPU, GPU, ML and systems IP, SOCs some years before they appear in mainstream products. This candidate will contribute to DFT methodology by crafting flows, evaluating tool capabilities, helping other specialists on projects, detailing work through documentation, working with EDA vendors and propagating DFT methodologies. This position may also include meeting with customers for DFT training or to address DFT concerns. The candidate will be the first recruit in the DFT methodology group in Bangalore and will be responsible for leading the team in bangalore.

Required Skills And Experience:

- This role is for a Principal DFT engineer with 12 years plus experience
- Technical leadership in DFT and ability to train/work with junior team members
- Experience with Perl, TCL, and/or python with ability to build and deploy generic DFT flows
- Proficient in Unix/Linux environments
- One or more core DFT skills are considered crucial for this position including some of the following
- Knowledge of at-speed testing, test insertion and test coverage assessment, test pattern development, scan compression, Memory BIST, Logic BIST, JTAG, IJTAG, fault simulation, debug, verification, SSN, designing and conducting experiments/tool evaluations.
- Experience with Siemens, Cadence and/or Synopsys DFT tools
- Qualified candidates will have a university degree (or equivalent) in Electronic Engineering, Computer Engineering, or other relevant technical subject area.

"Nice To Have" Skills and Experience :

- Familiarity with IEEE standards such as 1500, 1149.1, 1687 and 1838
- Familiarity with supporting silicon into volume production
- Knowledge of SSN and 3DIC
- Gained some exposure to digital ASIC frontend and backend design & verification processes
- Hands-on Synthesis and Static Timing Analysis (STA) experience
- Familiarity with SOC architectures (Auto/Infrastructure/Client) and low power design practices would be an advantage
- Understanding of Functional Safety as it applies to DFT
- Working knowledge of Siemens MBIST and LBIST tools
- Exposure to simulation and formal verification tools
- Exposure to AI tools for execution
- Exposure Arm MBIST interface

In Return

You will be provided with the training and environment to succeed in this role. As well as a friendly and high-performance working environment, Arm offers a competitive benefits package including private medical insurance, sabbatical, supplementary pension, and wellness benefits. We are offering a hybrid approach to home and office working to provide an adaptable experience for all employees and to promote a strong collaborative environment.

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