Mts Silicon Design Engineer 3 Days Left

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry our communities and the world Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center artificial intelligence PCs gaming and embedded Underpinning our mission is the AMD culture We push the limits of innovation to solve the world s most important challenges We strive for execution excellence while being direct humble collaborative and inclusive of diverse perspectives AMD together we advance MTS SILICON DESIGN ENGINEER THE ROLE The position will involve working with a very experienced physical design team of Server SOC and is responsible for delivering the physical design of tiles to meet challenging goals for frequency power and other design requirements for AMD next generation processors in a fast-paced environment on cutting edge technology THE PERSON Engineer with good attitude who seeks new challenges and has good analytical and and problem-solving skills Candidate needs to have the ability and desire to learn quickly and should be a good team player who has excellent communication skills and experience collaborating with other engineers located in different sites timezones KEY RESPONSIBILITIES Implementing RTL to GDS2 flow Handling Floor-plan Physical Implementation of Power-plan Synthesis Placement CTS Timing Closure Routing Extraction Physical Verification DRC LVS Crosstalk Analysis EM IR Handling different PNR tools - Synopsys ICC2 ICC Design Compiler PrimeTime StarRC Mentor Graphics Calibre Apache Redhawk PREFERRED EXPERIENCE 8 years of professional experience in physical design preferably with high performance designs Experience in automated synthesis and timing driven place and route of RTL blocks for high speed datapath and control logic applications Experience in automated design flows for clock tree synthesis clock and power gating techniques scan stitching design optimization for improved timing power area and design cycle time reduction Experience in floorplanning establishing design methodology IP integration checks for logic equivalence physical timing electrical quality and final signoff for large IP delivery Strong experience with tools for logic synthesis place and route timing analysis and design checks for physical and electrical quality familiarity with tools for schematics layout and circuit logic simulation Versatility with scripts to automate design flow Strong communication skills ability to multi-task across projects and work with geographically spread out teams Experience in FinFET Dual Patterning nodes such as 16 14 10 7 5nm Excellent physical design and timing background Good understanding of computer organization architecture is preferred Strong analytical problem solving skills and pronounced attention to details ACADEMIC CREDENTIALS Qualification Bachelors or Masters in Electronics Electrical Engineering LOCATION Hyderabad Bangalore LI-PK2 Benefits offered are described AMD does not accept unsolicited resumes from headhunters recruitment agencies or fee-based recruitment services AMD and its subsidiaries are equal opportunity inclusive employers and will consider all applicants without regard to age ancestry color marital status medical condition mental or physical disability national origin race religion political and or third-party affiliation sex pregnancy sexual orientation gender identity military or veteran status or any other characteristic protected by law We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process