Cpu/core/processor Rtl Design Architect

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry our communities and the world Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center artificial intelligence PCs gaming and embedded Underpinning our mission is the AMD culture We push the limits of innovation to solve the world s most important challenges We strive for execution excellence while being direct humble collaborative and inclusive of diverse perspectives AMD together we advance PMTS SILICON DESIGN ENGINEER THE PERSON You have a passion for modern complex processor architecture digital design as well as verification design quality You are a leader and team player who has excellent communication skills strong analytical problem-solving skills and are willing to take on some of the world s most complex problems A global mindset and ability to work in a multi - site environment are keys to being successful in this role KEY RESPONSIBILITIES RTL design of high performance x86-core ISA features clock reset power features of processor IP Integration sub-system level design Architect and design of power management features cache coherency Design optimization for implementing power efficient IP implementing the RTL using low power techniques Responsible for the inter IP integration issues resolution Own the Clock-Domain crossing Linting aspects of the overall design of the IP and the subsystem Work closely with DFT Physical Design and SOC teams to incorporate the interdisciplinary feedback into the design Architecting micro-architecting and documentation of the design features Lead design team from all aspects of the RTL deliverables Mentor the junior members of the RTL team to meet the team goals Represents AMD to the outside technical community partners and vendors Your commitment to innovating as a team demonstrated through excellent communication knowledge of proper documentation techniques and independently driving tasks to completion PREFERRED EXPERIENCE 15 years of experience in Digital IP ASIC design and Verilog RTL development Experience in full IP design cycle requirements definition architecture and microarchitecture specification Must have experience leading a large block or design from concept till tapeout Should be well versed with RTL design verification design quality checks synthesis timing closure and post silicon validation Experience with handling Floating Point RTL is a plus Expert on Verilog RTL design and has experience of multiscale digital IP ASIC projects Should possess expertise in front-end EDA tools sign-off and its flows Familiarity with low power design and low power flow is an added plus Patents Papers in Digital IP ASIC design would be preferred Highly motivated to seek out solutions and willing to learn new skills to fulfill job requirements Proven interpersonal skills leadership and teamwork Excellent writing skills in the English language editing and organizational skills required Skilled at prioritization and multi-tasking Good understanding of engineering terminology used within the semiconductor industry Good understanding of digital design concepts Knowledge of or experience in functional design verification or design is highly desired ACADEMIC CREDENTIALS Master s degree preferred with emphasis in Electrical Electronics Engineering Computer Engineering or VLSI design Engineering LI-RR1 LI-Hybrid Benefits offered are described AMD does not accept unsolicited resumes from headhunters recruitment agencies or fee-based recruitment services AMD and its subsidiaries are equal opportunity inclusive employers and will consider all applicants without regard to age ancestry color marital status medical condition mental or physical disability national origin race religion political and or third-party affiliation sex pregnancy sexual orientation gender identity military or veteran status or any other characteristic protected by law We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process