SOC Design Engg

Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design. Participates in the definition of architecture and microarchitecture features of the block being designed. Performs quality checks in various logic design aspects...

Experience in SoC Verification Knowledge in DFX, design for test, debug, and manufacturing. Experience in post-Si validation/debug Experience in SOC or IP verification UVM/OVM testbench knowledge Good understanding of SoC architecture / uArchitecture Strong analytical ability, problem solving and communication skills Facilitator of direct and open...

Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design. Participates in the definition of architecture and microarchitecture features of the block being designed. Performs quality checks in various logic design aspects...

Strong knowledge of DFT architectures and methodologies which includes Scan, ATPG, Mbist, BScan, IO DFx, analog DFT, JTAG, Boundary scan etc and proven knowledge of Verilog and System Verilog, RTL design and micro-architecture skills. Strong knowledge of SoC tools/methodology ( VCS, Synthesis, Spyglass, Tessent Industry standard ATPG/MBIST tools design...

Should have experience in conceptualizing the approach for verification of a design block, construction of test benches and test plans. Should have experience in using System Verilog and VMM (or UVM) methodologies. Should possess strong problem solving skills and debug the test failures to root cause the failures. Should have got prior experience in...

Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise...

Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level...

Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level...

Experience in SoC VerificationKnowledge in DFX, design for test, debug, and manufacturing.Experience in post-Si validation/debugExperience in SOC or IP verificationUVM/OVM testbench knowledgeGood understanding of SoC architecture / uArchitectureStrong analytical ability, problem solving and communication skillsFacilitator of direct and open communication,...

In this position you will be responsible for: Performance Verification (PV)/STA including timing analysis, noise glitch analysis for leading-edge designs. Development and validation of constraints for blocks, subFC and Full Chip Understanding of IO/ACIO timing closure Understanding of Synthesis, DFT insertions that include MBIST and SCAN. Timing...

Strong knowledge of DFT architectures and methodologies which includes Scan, ATPG, Mbist, BScan, IO DFx, analog DFT, JTAG, Boundary scan etcand proven knowledge of Verilog and System Verilog, RTL design and micro-architecture skills. Strong knowledge of SoC tools/methodology( VCS, Synthesis, Spyglass, Tessent Industry standard ATPG/MBIST tools design...

Should have experience in conceptualizing the approach for verification of a design block, construction of test benches and test plans.Should have experience in using System Verilog and VMM (or UVM) methodologies.Should possess strong problem solving skills and debug the test failures to root cause the failures.Should have got prior experience in...

Physical design engineer with experience in Structural Design. Hands-on experience of block, IP, and full-chip floor-planning, synthesis, APR, static-timing, electrical/reliability analysis, tapeout flows.Leading capability to drive SD improvements, definitions and execution. Good communication and team work skills. Knowledge of RTL-to-GDS flow through...

Physical design engineer with experience in Structural Design. Hands-on experience of block, IP, and full-chip floor-planning, synthesis, APR, static-timing, electrical/reliability analysis, tapeout flows.Leading capability to drive SD improvements, definitions and execution. Good communication and team work skills. Knowledge of RTL-to-GDS flow through...

Physical design engineer with experience in Structural Design. Hands-on experience of block, IP, and full-chip floor-planning, synthesis, APR, static-timing, electrical/reliability analysis, tapeout flows.Leading capability to drive SD improvements, definitions and execution. Good communication and team work skills. Knowledge of RTL-to-GDS flow through...

**Qualifications**: Experience : Should have 9 - 15 years of experience in pre-silicon validation of complex IP and/or SoC design. Bachelor Degree in Electrical and Electronics Engineering or Master Degree in Electrical and Electronics Engineering or Computer Engineering Strong Communications skills and the ability to effectively work with cross functional...

Interacting with the architecture/RTL Teams and understanding the power Architectures. Additional experience in Low Power Logical Equivalence is added advantage. **Qualifications**: Qualifications: Experience : Should have 5+ years of experience in relevant field Bachelor Degree in Electrical and Electronics Engineering or Master Degree in Electrical and...

Interacting with the architecture/RTL Teams and understanding the power Architectures. Additional experience in Low Power Logical Equivalence is added advantage. **Qualifications**: **Qualifications**: - Experience - Should have 5+ years of experience in relevant field Bachelor Degree in Electrical and Electronics Engineering or Master Degree in...

Physical design engineer with experience in Structural Design. Hands-on experience of block, IP, and full-chip floor-planning, synthesis, APR, static-timing, electrical/reliability analysis, tapeout flows.Leading capability to drive SD improvements, definitions and execution. Good communication and team work skills. Knowledge of RTL-to-GDS flow through...

Physical design engineer with experience in Structural Design. Hands-on experience of block, IP, and full-chip floor-planning, synthesis, APR, static-timing, electrical/reliability analysis, tapeout flows.Leading capability to drive SD improvements, definitions and execution. Good communication and team work skills. Knowledge of RTL-to-GDS flow through...