Pcie & Cxl Microarchitecture & Logic Design - Full

PCIe-CXL-Senior Micro-ArchitectExperience: yearsLocation: Bengaluru, IndiaJob Type: Full TimeDescription:Senior Principal RTL Design Engineer with experience in Architecting/designing/integrating PCIe Root Complex, Host Bridge, Root Port, Address Translation Service and IOMMU for Server side PCIe Root Complex functionality. Ability to use IPs from standard...

PCIe-CXL-Senior Micro-ArchitectExperience: yearsLocation: Bengaluru, IndiaJob Type: Full TimeDescription:Senior Principal RTL Design Engineer with experience in Architecting/designing/integrating PCIe Root Complex, Host Bridge, Root Port, Address Translation Service and IOMMU for Server side PCIe Root Complex functionality. Ability to use IPs from standard...

PCIe-CXL-Senior Micro-ArchitectExperience: 12-25 + yearsLocation: Bengaluru, IndiaJob Type: Full TimeDescription:Senior Principal RTL Design Engineer with experience in Architecting/designing/integrating PCIe Root Complex, Host Bridge, Root Port, Address Translation Service and IOMMU for Server side PCIe Root Complex functionality. Ability to use IPs from...

Positions are open for full-time positions in the areas of SOC microarchitecture and logic design including on-chip interconnects, caches, high performance memory interface, system control, high-speed IO interfaces, and data parallel processing engine. We are looking for all levels of talent, from new college grads to advanced level of...

Role and Responsibilities : Lead the Architecture, Design and development of PCIe controller and integration into high-performance IBM mainframe and Power processors. Develop the features, present the proposed architecture in the High level design discussions Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design,...

SoC MicroArchitect:Location: BangaloreWe are looking for someone who will lead the development of high-speed cutting-edge SerDes design. As the lead of the micro-architectural definition and design implementation, the selected candidate will drive logic chip design achieving data of 16Gbs and above.SoC Micro-Architect, you will play a key role in the design...

SoC MicroArchitect:Location: BangaloreWe are looking for someone who will lead the development of high-speed cutting-edge SerDes design. As the lead of the micro-architectural definition and design implementation, the selected candidate will drive logic chip design achieving data of 16Gbs and above.SoC Micro-Architect, you will play a key role in the design...

JD:This role requires expertise in PCIe, CPU, Ethernet, CXL, DDR, and RISC-V technologies.Key Responsibilities:Develop and execute verification plans for hardware designs incorporating PCIe, Ethernet, CXL, DDR, and RISC-V technologies.Design and implement verification environments using SystemVerilog and UVM methodologies.Develop test cases to validate...

Job description: - Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C) - UVM testbench development to build a robust, scalable and efficient testbench to verify the design IPs. - In addition to UVM functional verification, role could involve Formal verification of complex...

Title: PCIe-CXL-Micro-ArchitectLocation: Bangalore, INSalary: Compensation is based on expertise and experienceLevel of Experience:SeniorWork Arrangement: OnsiteSenior RTL Design Engineer with experience inArchitecting/designing/integrating PCIe Root Complex, Host Bridge, RootPort, Address Translation Service and IOMMU for Server side PCIe RootComplex...

JD:This role requires expertise in PCIe, CPU, Ethernet, CXL, DDR, and RISC-V technologies. Key Responsibilities:Develop and execute verification plans for hardware designs incorporating PCIe, Ethernet, CXL, DDR, and RISC-V technologies.Design and implement verification environments using SystemVerilog and UVM methodologies.Develop test cases to validate...

JD:This role requires expertise in PCIe, CPU, Ethernet, CXL, DDR, and RISC-V technologies. Key Responsibilities:Develop and execute verification plans for hardware designs incorporating PCIe, Ethernet, CXL, DDR, and RISC-V technologies.Design and implement verification environments using SystemVerilog and UVM methodologies.Develop test cases to validate...

JD:This role requires expertise in PCIe, CPU, Ethernet, CXL, DDR, and RISC-V technologies. Key Responsibilities:Develop and execute verification plans for hardware designs incorporating PCIe, Ethernet, CXL, DDR, and RISC-V technologies.Design and implement verification environments using SystemVerilog and UVM methodologies.Develop test cases to validate...

JD: This role requires expertise in PCIe, CPU, Ethernet, CXL, DDR, and RISC-V technologies. Key Responsibilities: Develop and execute verification plans for hardware designs incorporating PCIe, Ethernet, CXL, DDR, and RISC-V technologies. Design and implement verification environments using SystemVerilog and UVM methodologies. Develop test cases to validate...

SoC MicroArchitect:Location: BangaloreWe are looking for someone who will lead the development of high-speed cutting-edge SerDes design. As the lead of the micro-architectural definition and design implementation, the selected candidate will drive logic chip design achieving data of 16Gbs and above.SoC Micro-Architect, you will play a key role in the design...

Job description: Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C) UVM testbench development to build a robust, scalable and efficient testbench to verify the design IPs. In addition to UVM functional verification, role could involve Formal verification of complex design...

Title: PCIe-CXL-Micro-Architect Location: Bangalore, IN Salary: Compensation is based on expertise and experience. Level of Experience: Senior Work Arrangement: Onsite 1. Senior RTL Design Engineer with experience in Architecting/designing/integrating PCIe Root Complex, Host Bridge, Root Port, Address Translation Service and IOMMU for Server side PCIe...

SoC MicroArchitect:Location: BangaloreWe are looking for someone who will lead the development of high-speed cutting-edge SerDes design. As the lead of the micro-architectural definition and design implementation, the selected candidate will drive logic chip design achieving data of 16Gbs and above. SoC Micro-Architect, you will play a key role in the design...

SoC MicroArchitect:Location: BangaloreWe are looking for someone who will lead the development of high-speed cutting-edge SerDes design. As the lead of the micro-architectural definition and design implementation, the selected candidate will drive logic chip design achieving data of 16Gbs and above. SoC Micro-Architect, you will play a key role in the design...

SoC MicroArchitect: Location: Bangalore We are looking for someone who will lead the development of high-speed cutting-edge SerDes design. As the lead of the micro-architectural definition and design implementation, the selected candidate will drive logic chip design achieving data of 16Gbs and above. SoC Micro-Architect, you will play a key role in the...