Physical Design Engineer

He/She should be able to do block level / top-level floor planning, PG Planning, partitioning(for hierarchical designs),placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks,...

Senior / Lead Physical Design Engineer - EMIR Job Description: Good understanding of IR/Power-Domain-Network signoff at SOC & block level. Experience in RHSC tool. Good at scripting – python. Must have knowledge of Physical Implementation (Synthesis and Place & Route). Effective communication. Strong analytical and problem solving abilities. EMIR signoff...

Physical Design Engineer - Senior / Lead Job Description: Strong background in digital IC design, including floorplanning, placement, routing, clock tree synthesis, and optimization. Tools Expertise: Proficient in Innovus, ICC2, and Fusion Compiler for place and route, timing closure, and physical design sign-off. Physical Design: Experience in...

Technical Requirements- Excellent problem-solving, leadership, and communication skills. Ability to work in a fast-paced environment and lead a cross-functional team.- In-depth knowledge of floor planning, power planning, PNR and signoff checks- Strong experience in static timing analysis (STA), timing closure, and signal integrity.- Expertise in power...

Technical Requirements Excellent problem-solving, leadership, and communication skills. Ability to work in a fast-paced environment and lead a cross-functional team. In-depth knowledge of floor planning, power planning, PNR and signoff checks Strong experience in static timing analysis (STA), timing closure, and signal integrity. Expertise in power...

Responsibilities: Top-level floor planning, PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks. Worked on 65nm or lower node...

EMIR Engineers Experience : 3years Location : Hyderabad Experience in ASIC EMIR/PD flow and EDA tools experience such as Redhawk-SC , Redhawk – IR and EM Analysis tool Analyze EMIR violations and provide implementation choices to Physical design Scripting language experience: Python, perl, shell preferred. Strong verbal and written...

Company Overview : MosChip is a semiconductor and embedded system design company with a focus on Embedded, Turnkey ASICs, Mixed Signal IP, Semiconductor & Product Engineering and IoT solutions catering to Aerospace & Defence, Consumer Electronics, Automotive, Medical and Networking & Telecommunications. Job Description: Experience: 4 - 12 Years Location:...

WHAT YOU DO AT AMD CHANGES EVERYTHINGWe care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our...

We are seeking a highly skilled Physical Design Engineer to join our team in the development of cutting-edge System-on-Chip (SoC) designs.As a key member of our engineering team, you will be responsible for designing and implementing complex SoC physical design solutions using industry-leading tools and technologies.Responsibilities:PnR tool expertise in...