RTL Design

RTL Design -Principal EngineerLocation: BangaloreAs an RTL design lead, you will play a key role in the design and development of complex ASICs and System-on-Chip architectures for various electronic devices. You will be responsible for RTL design, establishing good design practices, translating micro-architecture to efficient RTL, optimizing performance,...

Experience range : 4+ Yrs and above only(no freshers please) Work Location : Hyderabad Notice : Immediate to 15 days Job Scope: RTL development from micro-architecture SoC, Memory, Peripheral, Security and Cache IP’s Analysis & Integration RTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC) Failures Debug/Bug fixes on RTL and Netlist Low level...

Experience range : 4+ Yrs and above only(no freshers please)Work Location : HyderabadNotice : Immediate to 15 daysJob Scope:RTL development from micro-architectureSoC, Memory, Peripheral, Security and Cache IP’s Analysis & IntegrationRTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC)Failures Debug/Bug fixes on RTL and NetlistLow level design...

Experience range : 4+ Yrs and above only(no freshers please) Work Location : Hyderabad Notice : Immediate to 15 days Job Scope: RTL development from micro-architecture SoC, Memory, Peripheral, Security and Cache IP’s Analysis & Integration RTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC) Failures Debug/Bug fixes on RTL and Netlist Low level...

Experience range : 4+ Yrs and above only(no freshers please)Work Location : HyderabadNotice : Immediate to 15 days Job Scope: RTL development from micro-architectureSoC, Memory, Peripheral, Security and Cache IP’s Analysis & IntegrationRTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC)Failures Debug/Bug fixes on RTL and NetlistLow level design...

Experience range : 4+ Yrs and above only(no freshers please) Work Location : Hyderabad Notice : Immediate to 15 days Job Scope: RTL development from micro-architecture SoC, Memory, Peripheral, Security and Cache IP’s Analysis & Integration RTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC) Failures Debug/Bug fixes on RTL and Netlist Low level...

Experience range : 4+ Yrs and above only(no freshers please)Work Location : HyderabadNotice : Immediate to 15 days Job Scope: RTL development from micro-architectureSoC, Memory, Peripheral, Security and Cache IP’s Analysis & IntegrationRTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC)Failures Debug/Bug fixes on RTL and NetlistLow level design...

General knowledge how things work in RTL team and be able to handle basic-to-mid level RTL tasks: RTL design/release flows/infra (LINT, CDC, UPF, IPXACT, CSR …) Good working knowledge in general scripting (Perl, Python, Make ...) Customer methodology/flow ask and complaints. Should be able to take up infra cleanup. Some good examples of infra...

General knowledge how things work in RTL team and be able to handle basic-to-mid level RTL tasks:RTL design/release flows/infra (LINT, CDC, UPF, IPXACT, CSR …)Good working knowledge in general scripting (Perl, Python, Make ...)Customer methodology/flow ask and complaints. Should be able to take up infra cleanup. Some good examples of infra...

Experience: 2-3 YrsLocation : HyderabadStrong in RTL digital design with Verilog/VHDL.Strong familiarity with FPGA Vivado Design creation , taking it through Synthesis, implementation, bit-stream generation.Thorough understanding of the design constraints ( timing , IO LOC, placement etc.,)Knowledge of system-level architecture including buses like...

General knowledge how things work in RTL team and be able to handle basic-to-mid level RTL tasks:RTL design/release flows/infra (LINT, CDC, UPF, IPXACT, CSR …)Good working knowledge in general scripting (Perl, Python, Make ...)Customer methodology/flow ask and complaints. Should be able to take up infra cleanup. Some good examples of infra...

General knowledge how things work in RTL team and be able to handle basic-to-mid level RTL tasks:RTL design/release flows/infra (LINT, CDC, UPF, IPXACT, CSR …)Good working knowledge in general scripting (Perl, Python, Make ...)Customer methodology/flow ask and complaints. Should be able to take up infra cleanup. Some good examples of infra...

General knowledge how things work in RTL team and be able to handle basic-to-mid level RTL tasks: RTL design/release flows/infra (LINT, CDC, UPF, IPXACT, CSR …) Good working knowledge in general scripting (Perl, Python, Make ...) Customer methodology/flow ask and complaints. Should be able to take up infra cleanup. Some good examples of infra cleanup:...

General knowledge how things work in RTL team and be able to handle basic-to-mid level RTL tasks:RTL design/release flows/infra (LINT, CDC, UPF, IPXACT, CSR …)Good working knowledge in general scripting (Perl, Python, Make ...)Customer methodology/flow ask and complaints. Should be able to take up infra cleanup. Some good examples of infra...

RTL Design Engineers at Hyderabad We need experienced engineers to work on cutting edge technology and with complex functionality. Skills: Overall 3+ years industry experience with 2+ years in RTL Design and SoC Integration. Proven hands-on experience with RTL design for IP, the subsystem for ASIC. Hands-on experience with SoC integration issues like...

RTL Design Engineers at HyderabadWe need experienced engineers to work on cutting edge technology and with complex functionality.Skills:Overall 3+ years industry experience with 2+ years in RTL Design and SoC Integration.Proven hands-on experience with RTL design for IP, the subsystem for ASIC.Hands-on experience with SoC integration issues like clocking,...

RTL Design Engineers at HyderabadWe need experienced engineers to work on cutting edge technology and with complex functionality.Skills:Overall 3+ years industry experience with 2+ years in RTL Design and SoC Integration.Proven hands-on experience with RTL design for IP, the subsystem for ASIC.Hands-on experience with SoC integration issues like clocking,...

RTL Design Engineers at HyderabadWe need experienced engineers to work on cutting edge technology and with complex functionality.Skills:Overall 3+ years industry experience with 2+ years in RTL Design and SoC Integration.Proven hands-on experience with RTL design for IP, the subsystem for ASIC.Hands-on experience with SoC integration issues like clocking,...

RTL Design Engineers at HyderabadWe need experienced engineers to work on cutting edge technology and with complex functionality.Skills:Overall 3+ years industry experience with 2+ years in RTL Design and SoC Integration.Proven hands-on experience with RTL design for IP, the subsystem for ASIC.Hands-on experience with SoC integration issues like clocking,...

RTL Design Engineers at Hyderabad We need experienced engineers to work on cutting edge technology and with complex functionality. Skills: Overall 3+ years industry experience with 2+ years in RTL Design and SoC Integration. Proven hands-on experience with RTL design for IP, the subsystem for ASIC. Hands-on experience with SoC integration issues like...