Senior ASIC RTL Design Engineer

Name of position: Senior ASIC RTL Design Number of Positions: 2 Location of Position: Hyderabad/Bangalore/Chennai Mode of work: In office (5 Days) (For Bangalore/Chennai it will be remote) Required Experience level: 8+ years Required Key Skills: RTL Logic Design, Interface Protocols (PCIe, USB, Ethernet, DDR3/4, LPDDR, I2C/I3C, SPI,...

About the job :An AI-enhanced security processor company redefining the control and management of every digital system. The company was founded in 2017 and currently has 100+ employees. Developing great technology takes more than talent: amazing people who understand collaboration, respect each other, and go the extra mile to achieve exceptional results. It...

RTL Design Engineers at Hyderabad We need experienced engineers to work on cutting edge technology and with complex functionality. Skills: Overall 3+ years industry experience with 2+ years in RTL Design and SoC Integration. Proven hands-on experience with RTL design for IP, the subsystem for ASIC. Hands-on experience with SoC integration issues like...

RTL Design Engineers at HyderabadWe need experienced engineers to work on cutting edge technology and with complex functionality.Skills:Overall 3+ years industry experience with 2+ years in RTL Design and SoC Integration.Proven hands-on experience with RTL design for IP, the subsystem for ASIC.Hands-on experience with SoC integration issues like clocking,...

RTL Design Engineers at HyderabadWe need experienced engineers to work on cutting edge technology and with complex functionality.Skills:Overall 3+ years industry experience with 2+ years in RTL Design and SoC Integration.Proven hands-on experience with RTL design for IP, the subsystem for ASIC.Hands-on experience with SoC integration issues like clocking,...

RTL Design Engineers at HyderabadWe need experienced engineers to work on cutting edge technology and with complex functionality.Skills:Overall 3+ years industry experience with 2+ years in RTL Design and SoC Integration.Proven hands-on experience with RTL design for IP, the subsystem for ASIC.Hands-on experience with SoC integration issues like clocking,...

RTL Design Engineers at Hyderabad We need experienced engineers to work on cutting edge technology and with complex functionality. Skills: Overall 3+ years industry experience with 2+ years in RTL Design and SoC Integration. Proven hands-on experience with RTL design for IP, the subsystem for ASIC. Hands-on experience with SoC integration issues like...

RTL Design Engineers at HyderabadWe need experienced engineers to work on cutting edge technology and with complex functionality.Skills:Overall 3+ years industry experience with 2+ years in RTL Design and SoC Integration.Proven hands-on experience with RTL design for IP, the subsystem for ASIC.Hands-on experience with SoC integration issues like clocking,...

OverviewThe ASICDesign Engineer plays a crucial role in our organization bydeveloping integrated circuits from concept to mass production.They are responsible for designing and verifying complex digitaland mixedsignal ASICs for variousapplications.KeyresponsibilitiesCollaborate withcrossfunctional teams to define ASIC specifications andarchitecture.Design...

Staff Engineer, ASIC Design Summary Experience Required: 7 - 12 YearsJob Term: PermanentLocation: HyderabadCategory: Semiconductor DesignWorld leader in innovative memory solutions•BS/MS in E&E or related field with 10+ years of experience.•Proven hands-on experience with IP & SOC RTL design.•Experience with micro-architecture, Asynchronous digital...

Staff Engineer, ASIC Design Summary Experience Required: 7 - 12 Years Job Term: Permanent Location: Hyderabad Category: Semiconductor Design World leader in innovative memory solutions •BS/MS in E&E or related field with 10+ years of experience. •Proven hands-on experience with IP & SOC RTL design. •Experience with micro-architecture,...

General knowledge how things work in RTL team and be able to handle basic-to-mid level RTL tasks:RTL design/release flows/infra (LINT, CDC, UPF, IPXACT, CSR …)Good working knowledge in general scripting (Perl, Python, Make ...)Customer methodology/flow ask and complaints. Should be able to take up infra cleanup. Some good examples of infra...

General knowledge how things work in RTL team and be able to handle basic-to-mid level RTL tasks:RTL design/release flows/infra (LINT, CDC, UPF, IPXACT, CSR …)Good working knowledge in general scripting (Perl, Python, Make ...)Customer methodology/flow ask and complaints. Should be able to take up infra cleanup. Some good examples of infra...

General knowledge how things work in RTL team and be able to handle basic-to-mid level RTL tasks:RTL design/release flows/infra (LINT, CDC, UPF, IPXACT, CSR …)Good working knowledge in general scripting (Perl, Python, Make ...)Customer methodology/flow ask and complaints. Should be able to take up infra cleanup. Some good examples of infra...

General knowledge how things work in RTL team and be able to handle basic-to-mid level RTL tasks:RTL design/release flows/infra (LINT, CDC, UPF, IPXACT, CSR …)Good working knowledge in general scripting (Perl, Python, Make ...)Customer methodology/flow ask and complaints. Should be able to take up infra cleanup. Some good examples of infra...

General knowledge how things work in RTL team and be able to handle basic-to-mid level RTL tasks: RTL design/release flows/infra (LINT, CDC, UPF, IPXACT, CSR …) Good working knowledge in general scripting (Perl, Python, Make ...) Customer methodology/flow ask and complaints. Should be able to take up infra cleanup. Some good examples of infra cleanup:...

RTL Design -Principal EngineerLocation: BangaloreAs an RTL design lead, you will play a key role in the design and development of complex ASICs and System-on-Chip architectures for various electronic devices. You will be responsible for RTL design, establishing good design practices, translating micro-architecture to efficient RTL, optimizing performance,...

We are now looking for a ASIC Design Engineer - Hardware. As a member of our ASIC backend/timing team, you'll be working on product designs, focusing on such tasks as clocks, timing convergence, chip layout planning, design optimization and automation of work flows. Specifically you'll be focusing on full chip layout planning (partitioning, planning clock...

ASIC IP DV - Senior/Staff Engineer Summary Experience Required: 6 - 12 YearsJob Term: PermanentLocation: HyderabadCategory: Semiconductor DesignWorld leader in innovative memory solutionsRoles & Responsibilities:• To be part of a highly skilled ASIC Team working on the newest technology nodes• Responsible for overall IP/Block and sub-system verification...

ASIC IP DV - Senior/Staff Engineer Summary Experience Required: 6 - 12 Years Job Term: Permanent Location: Hyderabad Category: Semiconductor Design World leader in innovative memory solutions Roles & Responsibilities: • To be part of a highly skilled ASIC Team working on the newest technology nodes • Responsible for overall IP/Block and sub-system...