Hardware Design Developer

3 weeks ago

India BrewApps LLC Full time

We're searching for an exceptional Hardware Design Developer to play a pivotal role in using the hardware design platform to generate training data to enhance enterprise LLMs' capabilities. This unique position offers the chance to directly contribute to the sophistication of enterprise LLMs, ensuring they operate with unparalleled efficiency and intelligence.


Your Mission:

  • Develop, configure, and customize the hardware design platform, utilizing it to generate vital training data for enterprise LLMs.
  • Liaise with research teams to translate requirements into actionable data insights, directly impacting our LLMs' performance.
  • Uphold the highest standards in coding, debugging, and documentation, ensuring the hardware design solutions are optimized for LLM training and benchmarking.
  • Collaborate across teams to identify and prioritize needs, contributing to the LLMs' ability to understand and automate complex processes.


Job Requirements:

  • BS or MS degree in Electrical Engineering or a related field.
  • 3-5 years of proven experience in hardware design development. Expertise in HDLs such as Verilog, SystemVerilog, VHDL, and SystemC. Expertise in scripting, front-end, and verification workflows, and integrations within the hardware design environment.
  • Exceptional problem-solving, communication, and collaborative skills. Familiarity with Synopsys/Cadence or open source toolchains.


Preferred Qualifications:

  • Expertise in UVM environments. Expertise in Formal Verification. Expertise in Lint process and refinement.
  • Experience with Computer Architecture and Assembly Coding and Debugging.
  • Experience with Assertion Coding and SVA. Familiarity with ML and AI systems.


Job Details:

  • Mandatory Skills: HDLs such as Verilog, SystemVerilog, VHDL, and SystemC (3+ years of experience required).
  • Total Years of Experience: 3+ years (mandatory). Opportunity: Full-time, 8 hours per day.
  • Notice Period: 3-4 weeks only, while working part-time. Engagement Length: 6 months (possibility of extension).


Search Keywords:

  • Systems: Verilog, SystemVerilog Tools: Synopsys, Cadence
  • Knowledge: C, C++, Python, General Scripts


Key Experiences:

  • IP Development: Verification and Front End.
  • Development: EDA Tools (VLSI Industry), Verilog + SystemVerilog.
  • Project Description: Modules implemented and integrated, IP, USP, HDM. Problem Solving: Ability to solve problems, not just connect systems.
  • Test Plan Development: Ability to describe and develop test plans.
  • Verification Workflow: Implementation, Checker System, Test Strategy, Optimization, Verification to Front End Teams.
  • IP Knowledge: Understanding and solving IP problems.
  • System Integration: Describing projects integrated in systems, engaging IPs, and development of IP.

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