Manager - Design Verification

3 weeks ago


Bengaluru, India GreenWave™ Radios Full time
#GreenWave Radios is looking for a # DesignVerification (DV) Manager

to join a growing start up semiconductor development organization and to help drive excellence in our 5G ORAN products.Key ResponsibilitiesManage 10-12 DV & design engineers for technical leadership and mentoring team members for team buildingWork as the primary interface to US design/verification team members and managementTrack verification progress, Identify and close verification gaps to show progress towards tape-out.Provide an executive summary for the verification status on each sub-systemFull-chip functional verification of 5G Digital Radio #SOCDevelop, review and execute SOC verification plans on internal and 3rd party IPsArchitect verification framework for mix-signal SOC verificationVerify full chip SoC using #UVM - Directed/Constrained-RandomVerify internal and 3rd party IP blocks with functional vector, VIP and UVMCollaborate with cross functional teams (System, Emulation, FW) for silicon tapeout and product solution developmentExplore and propose advanced verification methodologies - UVM, FPGA prototyping, emulation,Minimum QualificationsTech or B.Tech degree in Electrical or Computer Engineering or equivalent15+ yrs of successfully executing and/or managing multiple IP, SOC Verification projectsHave successfully led verification efforts at IP and/or SOC level for multipleExtensive experience in developing UVM-based SV test-benches - Directed/Constrained-RandomDeep understanding and knowledge of verification methodologies, flows and qualityPrior work experience with complex coverage-driven random constraint UVMPutting together complex UVM environments from scratch is aStrong experience with digital logic design, and logic verification methodologyHands-on experience with CNDS simulation and verification tools (Xcelium, vManager)Hands-on experience in 3r party IP verification using VIPs from CNDS/SNPS with front/back-door loading/configurationHands-on experience in multi-core ARM CPUs & AXI/AHB/API bus system verificationHands-on experience developing verification collateral in System Verilog and UVMFamiliar with Version control software like Git, SubversionFamiliar with gate-level simulationFamiliar with boot rom simulationsFamiliar with matlab simulationsExperience on FPGA emulationGood knowledge of programming languages such as C, VHDL, System-Verilog and scripting language like TCL and Python.Preferred SkillsKnowledge of ARM and Wireless signal-processing design is highlyUVM Proficiency is requiredStrong communication skills both written andAmbitious and goal orientedCollaborate effectively in a dynamic team environment.



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