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SRAM Layout Engineer

3 months ago

Greater Hyderabad Area, India Mulya Technologies Full time

SRAM Layout Engineer

About Us

We are a technology consulting company delivering best-in class Chip Design Services.

Founded in 2008, we partner with top semiconductor companies in building a connected, safer tomorrow.



With over 40+ tapeouts and expertise spanning the breadth of chip design, we offer a wide variety of Semiconductor skills

Our embedded design services are centered around FW validation & Test Automation

Chip Design Services

Analog IP Design

Foundation - OpAmp, Bandgap

IOs - GPIO, I2C, LVDS

Clocking - PLL

Power - LDO


SoC Design

RTL Design, Integration, Lint/CDC/RDC, UPF

IP/SoC UVM Verification

PPA, Synthesis, Constraints Management

Physical Design, Timing Closure, ECOs

Sign-off - Timing, Power, EM/IR, DRC/LVS/ERC


PDK, Design Automation

DRC/LVS/Extraction Rule deck Development

PCell Development

Automation Tools in Perl, Python, GoLang


Approach

We support a mix of engagement models to support diverse client requirements.

Engagement Models

Turnkey (SoW) Engagement

Staff Augmentation (T&M)

Offshore Design Center


Key Enablers

Hands on Leadership

Proven Industry Experts

TSMC DCA Parternship

Collaboration with Academia


Location: Hyderabad


SRAM Layout Engineer


### Job Description: SRAM Layout Engineer (3-5 Years of Experience)


**Position Title:** SRAM Layout Engineer


#### **Job Summary:**


We are seeking a highly skilled and motivated SRAM Layout Engineer with 3-5 years of experience to join our innovative team. The ideal candidate will be responsible for designing, optimizing, and verifying Static Random-Access Memory (SRAM) layouts for advanced semiconductor technologies. This role requires a strong understanding of layout design principles, semiconductor fabrication processes, and a keen eye for detail.


#### **Key Responsibilities:**


- **Layout Design:**

- Design and optimize SRAM cell layouts, arrays, and peripheral circuits.

- Ensure designs meet performance, power, area, and manufacturability requirements.

- Collaborate with circuit design and process technology teams to integrate layouts into overall chip designs.


- **Verification and Validation:**

- Perform layout versus schematic (LVS) and design rule checking (DRC) to ensure accuracy and compliance with design rules.

- Conduct electrical rule checking (ERC) and parasitic extraction to validate layout integrity and performance.


- **Process Optimization:**

- Work closely with fabrication teams to optimize layouts for manufacturability, yield, and reliability.

- Implement best practices to minimize variability and enhance robustness.


- **Documentation and Reporting:**

- Create detailed documentation for SRAM layouts, including design specifications, testing protocols, and validation reports.

- Present findings and recommendations to stakeholders.


- **Technical Support:**

- Provide technical support during the fabrication and testing processes, addressing issues related to SRAM layouts.

- Assist in troubleshooting and resolving layout-related problems.


- **Continuous Improvement:**

- Stay updated with the latest industry trends and technologies in SRAM layout design.

- Participate in continuous improvement initiatives to enhance design processes and methodologies.


#### **Qualifications:**


- **Education:**

- Bachelor’s degree in Electrical Engineering, Semiconductor Physics, or a related field. A master’s degree is a plus.


- **Experience:**

- 3-5 years of experience in SRAM layout design or a similar role.


- **Technical Skills:**

- Proficiency in CAD tools (e.g., Cadence Virtuoso, Mentor Graphics) for layout design.

- Strong understanding of semiconductor fabrication processes and design rules.

- Experience with DRC, LVS, ERC, and parasitic extraction tools and methodologies.

- Knowledge of SRAM architectures and memory design principles.


- **Soft Skills:**

- Excellent problem-solving skills and attention to detail.

- Strong communication and teamwork abilities.

- Ability to work independently and manage multiple projects simultaneously.


#### **Preferred Qualifications:**


- Experience with advanced node technologies (e.g., FinFET, SOI).

- Familiarity with automation and scripting for layout design.

- Knowledge of reliability testing and failure analysis for SRAM.


Contact:

Uday

Mulya Technologies

"Mining The Knowledge Community"