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Lead Physical Design Engineer
2 months ago
- IP/Block level PnR activities from Netlist to GDS-II.
- Good knowledge of all PnR activities like Floor-planning, Placement, CTS, Routing, Timing closure(STA), signoff checks like FEV, VCLP, EMIR and PV.
- Knowledge of industry standard EDA tools (Synopsys, Cadence, Mentor)
- Worked on DSM technologies, tsmc 5nm and below experience preferred.
- Knowledge of scripting skills.
- Minimum Experience: 8+ years