Logic Design Engineer

Fortune100 companyLogic Design EngineerLogic Design Engineer Your Role and ResponsibilitiesAs a Logic designer, you will be responsible for E2E development of features with impact to our Mainframe and / or POWER customers. Develop the feature, present the proposed architecture in the High level design discussions .Estimate the overall effort to develop...

Logic MicroArchitect:Location: BangaloreWe are looking for someone who will lead the development of high-speed cutting-edge SerDes design. As the lead of the micro-architectural definition and design implementation, the selected candidate will drive logic chip design achieving data of 16Gbs and above. SoC Micro-Architect, you will play a key role in the...

Fortune100 companyLogic Design EngineerLogic Design Engineer Your Role and ResponsibilitiesAs a Logic designer, you will be responsible for E2E development of features with impact to our Mainframe and / or POWER customers. Develop the feature, present the proposed architecture in the High level design discussions .Estimate the overall effort to develop...

CPU Architecture and Logic DesignA Fortune 100 OrganizationLocation: BangaloreYour Role and Responsibilities:As a Logic design lead in the Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the customers.Deep expertise in the implementation of...

CPU Architecture and Logic Design A Fortune 100 Organization Location: Bangalore Your Role and Responsibilities: As a Logic design lead in the Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the customers. Deep expertise in the implementation...

Logic MicroArchitect:Location: BangaloreWe are looking for someone who will lead the development of high-speed cutting-edge SerDes design. As the lead of the micro-architectural definition and design implementation, the selected candidate will drive logic chip design achieving data of 16Gbs and above.Experience:12+ Years of experience in PCIE G3/G4/G5 or...

A Fortune 100 OrganizationLocation: BangaloreSENIOR LOGIC DESIGN ENGINEER – Memory Management UnitYour Role and ResponsibilitiesLead the Architecture, Design and development of processor MMU (Memory management unit) for high-performance Systems.Develop micro-architecture, Design RTL, Collaborate with Verification, DFT, Physical design, FW, SW teams to...

ResponsibilitiesAs a “Principal Engineer – Logic Design” in memory interface chip design team, you willDevelop micro-architecture and RTL design for digital components for DDR memory buffer and other mixed signal chip products.Along with logic/RTL design, you will be responsible for synthesis, quality checks (lint, clock domain crossing etc.) and...

Responsibilities As a “Principal Engineer – Logic Design” in memory interface chip design team, you will Develop micro-architecture and RTL design for digital components for DDR memory buffer and other mixed signal chip products. Along with logic/RTL design, you will be responsible for synthesis, quality checks (lint, clock domain crossing...

CPU Architecture and Logic DesignA Fortune 100 OrganizationLocation: BangaloreYour Role and Responsibilities:As a Logic design lead in the Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the customers.Deep expertise in the implementation of...

Logic MicroArchitect:Location: BangaloreWe are looking for someone who will lead the development of high-speed cutting-edge SerDes design. As the lead of the micro-architectural definition and design implementation, the selected candidate will drive logic chip design achieving data of 16Gbs and above.Experience:12+ Years of experience in PCIE G3/G4/G5 or...

Responsibilities: · Complete DFT ownership of projects including: · Test architecture definition. · Identifying and implementing RTL changes for DFT. · Performing scan insertion. · Developing timing constraints for test mode timing closure. · Scan and ATPG for different fault models. · Boundary scan, ACJTAG, IEEE 1500 implementation and verification....

Responsibilities:· Complete DFT ownership of projects including:· Test architecture definition.· Identifying and implementing RTL changes for DFT.· Performing scan insertion.· Developing timing constraints for test mode timing closure.· Scan and ATPG for different fault models.· Boundary scan, ACJTAG, IEEE 1500 implementation and verification.·...

Responsibilities:· Complete DFT ownership of projects including:· Test architecture definition.· Identifying and implementing RTL changes for DFT.· Performing scan insertion.· Developing timing constraints for test mode timing closure.· Scan and ATPG for different fault models.· Boundary scan, ACJTAG, IEEE 1500 implementation and verification.·...

Logic MicroArchitect:Location: BangaloreWe are looking for someone who will lead the development of high-speed cutting-edge SerDes design. As the lead of the micro-architectural definition and design implementation, the selected candidate will drive logic chip design achieving data of 16Gbs and above.Experience:12+ Years of experience in PCIE G3/G4/G5 or...

A Fortune 100 Organization Senior Physical Design Engineer (Other Roles can be considered for exceptional candidates) Hands-on Role. also mentor team members technically Location: Bangalore you will be responsible for the high-performance CPU implementation, and timing closure. You'll be a key contributor to our innovative technology solutions, ensuring...

A Fortune 100 OrganizationSenior Physical Design Engineer (Other Roles can be considered for exceptional candidates) Hands-on Role. also mentor team members technicallyLocation: Bangaloreyou will be responsible for the high-performance CPU implementation, and timing closure. You'll be a key contributor to our innovative technology solutions, ensuring that...

Senior/Lead ASIC/VLSI/RTL/Front End Design Engineer/ Chip Lead IND, KA, Bangalore Silicon Systems Technology Group (SST) seeks ASIC Design Engineers to develop next generation of ASICs for new core routers, switches, and firewalls. Opportunity Snapshot: We are looking to hire sharp ASIC Design Engineers with excellent communication and leadership skills. You...

Senior/Lead ASIC/VLSI/RTL/Front End Design Engineer/ Chip LeadIND, KA, BangaloreSilicon Systems Technology Group (SST) seeks ASIC Design Engineers to develop next generation of ASICs for new core routers, switches, and firewalls.Opportunity Snapshot:We are looking to hire sharp ASIC Design Engineers with excellent communication and leadership skills.You will...

RTL IP/Logic Design Engineers / Design Architect Leads This position is for IP Design Engineer Lead/manager role at Samsung Semiconductor India Bangalore, where you will be involved in RTL design, synthesis and verification of various complex IP modules of SSD/Flash storage products. You will be associated in the design development life cycle to support...