RTL Design Engineer

Be part of the Cadence High-Speed SerDes PHY IP Front end Design team responsible for --Defining microarchitecture of digital blocks involving microcontroller-based designs to meet specifications, optimized for performance metrics of timing, area, and power.-Lead and also hands-on end-to-end ASIC design including RTL implementation and design processes of...

Be part of the Cadence High-Speed SerDes PHY IP Front end Design team responsible for --Defining microarchitecture of digital blocks involving microcontroller-based designs to meet specifications, optimized for performance metrics of timing, area, and power.-Lead and also hands-on end-to-end ASIC design including RTL implementation and design processes of...

Job Title: RTL Design EngineerLocation: Bengaluru, Karnataka, IndiaDuration: Full TimeJob description• 5+ years of experience in front end RTL design and front-end tools and flows• Experience in SOC integration, RTL release flows, clocking and reset architecture.• Experience in post RTL checks — Lint, CDC, RDC• Experience in RTL synthesis and...

Job Title – RTL Design EngineerJob Description –-Strong in Digital Design-Knowledge of VHDL/Verilog/System Verilog-Lint/CDC/Timing Closure-Knowledge of Validating IP, debugging of failures on target boards, board bring up.-Proficiency in Linux environment.-Good Communication skills.Basic job Deliverables – RTL Coding, IP Design, CDC, LINT, Vivado...

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for...

Note: This position requires 3+ years of industrial experience in RTL Design.Team and Role Overview: We are seeking a senior RTL Design Engineer to join our IC Design team. As a senior RTL Design Engineer, you will be responsible for and lead digital signal processing hardware designs, specifically data path as well as control intensive digital designs. You...

Job Description - Synthesis, Equivalence Checking, Clock-Domain Crossing (CDC) Analysis, Area/Power optimizations, Linting, Static Timing Analysis (STA)- Write design specifications for different functional blocks on a chip, Create micro-architecture diagrams of functional blocks, Design functional blocks using System Verilog RTL code, conduct Synthesis and...

Job Description- Synthesis, Equivalence Checking, Clock-Domain Crossing (CDC) Analysis, Area/Power optimizations, Linting, Static Timing Analysis (STA)- Write design specifications for different functional blocks on a chip, Create micro-architecture diagrams of functional blocks, Design functional blocks using System Verilog RTL code, conduct Synthesis and...

Position: RTL Design (Design /Sr. design Engineer/Design Lead /Sr. Design Lead/Manager/Sr. Managers)Experience: 3 years to 20 years relevant experience.Location - India and Onsite.Technical Skillset Required:RTL Design using VerilogSOC IP IntegrationInterconnect Protocols: AHB, AXI, APBSOC Interfaces: GPIO, SPI, I2C, UARTHigh Speed Serial Interfaces: PCIe...

Job description:Junior Engineer – 3 to 5 Years ExpHe should work with lead and program Manager.Self-motivated person.minimum 3 years relevant expRTl Exp is must , not require to code need proficient knowledge.RTl, Lint & CDC, GIT mandatory.Mode of Interview ( F2F)

RTL Design Engineers / Leads / Managers Experience: ~3 to 18+ YearsLocations: India, Hyd, Delhi (NCR), Chennai, Bangalore, Kerala, Ahmedabad, Pune, Mumbai, Etc).Job Description: Expertise in SoC/IP design.Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog.In depth knowledge on RTL quality checks (Lint,...

RTL Design Engineers / Leads / Managers Experience: ~3 to 18+ YearsLocations: India, Hyd, Delhi (NCR), Chennai, Bangalore, Kerala, Ahmedabad, Pune, Mumbai, Etc).Job Description: Expertise in SoC/IP design.Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog.In depth knowledge on RTL quality checks (Lint,...

Design & synthesize for a complex SerDes IPs in various technology nodes (> 100G rates)Work with Analog design teams to co-develop algorithms, feedback design loops as well as high speed critical digital circuitsGood understanding of working with signal processing IPs in terms of knowing calibrations, PLLs, dividers, FIFO design and reset...

Design & synthesize for a complex SerDes IPs in various technology nodes (> 100G rates)Work with Analog design teams to co-develop algorithms, feedback design loops as well as high speed critical digital circuitsGood understanding of working with signal processing IPs in terms of knowing calibrations, PLLs, dividers, FIFO design and reset...

Job Description AndGate Informatics Pvt. Ltd. is a technology solutions and recruitment company based in Bengaluru. Founded by industry professionals with extensive experience in Semiconductor, IT/Software, and Recruitment & Staffing, AndGate Informatics serves clients in India, Malaysia, Singapore, Vietnam, Taiwan, US, and UK. With a global team, we...

Job Title: ASIC RTL EngineerDuration: FulltimeLocation: BangaloreDescription:Experience in front end RTL design and front-end tools and flowsExperience in SOC integration, RTL release flows, clocking and reset architecture.Experience in post RTL checks — Lint, CDC, RDCExperience in RTL synthesis and static timing analysisExperience in working with...

Position: RTL Design (Design /Sr. design Engineer/Design Lead /Sr. Design Lead/Manager/Sr. Managers) Experience: 3 years to 20 years relevant experience. Location - India and Onsite. Technical Skillset Required: RTL Design using Verilog SOC IP Integration Interconnect Protocols: AHB, AXI, APB SOC Interfaces: GPIO, SPI, I2C, UART High Speed Serial...

DESIRED PROFILE : - Master's and/or Bachelor's degree in engineering (or equivalent) in EC/ EE/ CS with 3 or more years of experience in digital SoC development.- Experiences in RTL design using Verilog / SystemVerilog / VHDL for CPU / control sub-systems (AXI / AHB / APB bus), digital signal processing blocks(FIR filter, FFT/IFFT, NCO)-...

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. In this role, you will work with chip architects to conceive of the micro-architecture, and...

Job Description: B.tech or M.tech with 5+ years of experience on FE tools like Spyglass cdc and spyglass lint. Should have sound knowledge on synthesis and low power. Should have good knowledge on RTL coding and integration with excellent debug skills. Knowledge on git and CC framework will be better.Role involves running FE tools on DSP designs...