CPU Core Feature Verification and Debug Engineer

2 weeks ago

Bengaluru, India Tenstorrent Full time
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

CPU Core Feature Verification and Debug Engineer

RoleCPU core level feature / testplan verification engineer responsible for ISA and microarchitectural verificationResponsibilitiesFunctional verification with emphasis on core level testplanning, stimulus development and regression debug for simulation and emulation regressionsUnderstand ISA and microarchitectural specifications for the Core and create comprehensive testplansHands-on debug for core level failures. Propose and implement stimulus enhancements and debug capability improvements for core, cluster and chip level testbench environmentsDevelop architectural and microarchitectural coverage for core features and create stimulus for closing coverage in a timely mannerSupport design deployment across simulation and emulation platformsDevelop random and directed stimulus that spans pre-silicon, emulation and post-silicon domainWork with design, test and post silicon validation teams to ensure high quality delivery of the entire CPU core / cluster

Experience And QualificationsBS/MS/PhD in EE/ECE/CE/CS with 4-15 years of experienceStrong background and experience with high performance OOO CPU microarchitectureExperience and understanding of one or more ISAs - x86, ARM or RISCVExperience debugging RTL and DV in a simulation environment, proficient at waveform and log file based debugExperienced with assembly, C/C++ and UVM based stimulus generation targeting both ISA and microarchitectural scenariosFamiliar with simulation, formal and emulation environmentsHands-on with scripting (Python, PERL)Experience with hardware description languages (Verilog, VHDL) and simulators (VCS, NC, Verilator)Strong problem solving and debug skills across various levels of design hierarchiesLocations:

Bangalore, India

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

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