Engineer - Physical Design

Position Description:Exp: 7-12 Yrs· Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure.· The candidate will have the opportunity to work on many varieties of challenging...

Position Description:Exp: 7-12 Yrs· Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure.· The candidate will have the opportunity to work on many varieties of challenging...

Position Description: Exp: 7-12 Yrs · Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure.· The candidate will have the opportunity to work on many varieties of...

Position Description: Exp: 7-12 Yrs · Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure.· The candidate will have the opportunity to work on many varieties of...

Position Description: Exp: 7-12 Yrs · Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure. · The candidate will have the opportunity to work on many varieties of...

The group is responsible for development of full custom ASICs for leading edge storage solutions. About the role - you will: Work closely in Design Implementation team for physical design, physical verification & powerrelated activities across various SoCs Be able to work on block level Physical Design implementation using EDA tools Work on...

Position Description: Exp: 7-12 Yrs · Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure. · The candidate will have the opportunity to work on many varieties of...

The group is part of Seagate’s VLSI Organization spread globally across multiple sites. Seagate designs world class controller SoCs for their HDDs. The group is responsible for the development of full custom ASICs for leading edge storage solutions. About the role - you will: • Work closely in the Design Implementation team for physical design,...

The group is part of Seagate’s VLSI Organization spread globally across multiple sites. Seagate designs world class controller SoCs for their HDDs. The group is responsible for the development of full custom ASICs for leading edge storage solutions. About the role - you will: • Work closely in the Design Implementation team for physical...

Physical Design : 5 to 12 Years Location - Bangalore, Hyderabad, Ahmedabad, NoidaRoles :- In Depth experience in Physical Design Implementation & Signoff at block level at 16/7nm technology nodes. - Good exposure in Floor planning, CTS, STA, Physical Verification, Basic understanding of timing constraints. - Good exposure to...

Description The Role We are looking for an experienced Physical Design / CAD Engineer, Principal level, to join our small but growing Processor Design group, advancing the art of high performance implementation and physical design. Ideal candidates will develop and maintain physical design flows for high performance designs. What You'll Do: ...

Description Exp- 8- 12 Yrs Education: BE/ B Tech/ ME/ M Tech / MS B.Tech/BE/ME/Mtech with hands-on experience physical design , timing closure and physical verification. Exp with ASIC design flow, hierarchical physical design strategies, methodologies and understand deep sub-micron technology issues. Solid knowledge on physical design flow, Timing...

Description Exp- 8- 12 Yrs Education: BE/ B Tech/ ME/ M Tech / MS B.Tech/BE/ME/Mtech with hands-on experience physical design , timing closure and physical verification. Exp with ASIC design flow, hierarchical physical design strategies, methodologies and understand deep sub-micron technology issues. Solid knowledge on physical design...

Job Description:We are seeking a skilled Physical Verification Engineer with 5 - 12 years of experience to join our team. The ideal candidate will have expertise in physical design implementation and signoff at the block level, particularly at 16/7nm technology nodes. Key responsibilities include floor planning, clock tree synthesis (CTS), static timing...

Role Purpose The purpose of the role is to design, and architect VLSI and Hardware based products and enable delivery teams to provide exceptional client engagement and satisfaction. Do In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power. Integrity Analysis, Physical...

Role Purpose The purpose of the role is to design, and architect VLSI and Hardware based products and enable delivery teams to provide exceptional client engagement and satisfaction. Do In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power. Integrity Analysis, Physical...

Job Description:We are seeking a skilled Physical Verification Engineer with 5 - 12 years of experience to join our team. The ideal candidate will have expertise in physical design implementation and signoff at the block level, particularly at 16/7nm technology nodes. Key responsibilities include floor planning, clock tree synthesis (CTS), static timing...

Summary / Role Purpose The Senior R&D Engineer is responsible for the development of software products and supporting systems. As part of Office of CTO, in this role you will do research in Generative AI and deep learning on foundation models for physics building on top of SLM or LLMs to implement them on our local ML infrastructure.  Key Duties and...

Summary / Role Purpose The Senior R&D Engineer is responsible for the development of software products and supporting systems. As part of Office of CTO, in this role you will do research in Generative AI and deep learning on foundation models for physics building on top of SLM or LLMs to implement them on our local ML infrastructure.  Key Duties...

Summary / Role Purpose The Senior R&D Engineer is responsible for the development of software products and supporting systems. As part of Office of CTO, in this role you will do research in Generative AI and deep learning on foundation models for physics building on top of SLM or LLMs to implement them on our local ML infrastructure.    Key...