Senior Design Verification Engineer

4 weeks ago


Greater Hyderabad Area, India Mulya Technologies Full time

Senior Design Verification Engineer

Top10 Semiconductor Organization in the world

Hyderabad

SR ENG-DEG-HBM-VERIFICATION


Responsibilities


  • Depending on the expertise, the below set of responsibilities can be interpreted for fastspice (Primesim / Finesim) or Verilog (Xcelium/VCS) based verification.
  • Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes.
  • Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs.
  • Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features.
  • Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products.
  • Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design.
  • Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements.

Good To Have Skills/Experience


Common


  • Exposure to Gate Level Simulations (Not unit/zero delay)
  • Timing Checks & Analysis – Setup/Hold etc.
  • Logic schematic analysis

Digital Verification


  • High level understanding of UVM
  • DFT Features – Both custom DFT and standard like scan chains
  • Exposure to IEEE1500/JTAG

FastSpice Verification


  • Critical timing, data path timing analysis
  • Simulation based reliability analysis (BTI, HC)



Contact:

Uday

Mulya Technologies



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