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Senior Design Verification Engineer
2 months ago
- Name of position: Design Verification Engineer
- Number of Positions: 3
- Location of Position: Hyderabad/Bangalore/Chennai
- Mode of work: In office [5 Days] [For Bangalore/Chennai it will be remote]
- Required Experience level: 8+ years
- Required Key Skills: Interface Protocols [PCIe, USB, Ethernet, DDR3/4, LPDDR, I2C/I3C, SPI, SD/SDIO/eMMC, UART, etc.], UVM verification and UVM environment development (must have)
- Required Qualifications: BTech/MTech
- Hyderabad will be the priority as a location.
- For Bangalore/Chennai it will be remote as they have offices in Hyderabad
Company Description
We are a AI-enhanced security processor company redefining the control and management of every digital system. The company was founded in 2017 and currently has 100 employees. We are developing great technology takes more than talent: amazing people who understand collaboration, respect each other and go the extra mile to achieve exceptional results. It takes people who have the passion and desire to disrupt the status quo, deliver innovation, and change the world. If you have this passion, we invite you to apply for this job.
Job Description
The verification Engineer position is your opportunity to join one of the industry’s leading companies in Smart Edge SoCs for network/systems control, management security systems, and IIoT.
You will be responsible for RTL SoC/Subsystem verification of ARM-based SoCs, and work on industry-standard verification methodologies like UVM, Portable Stimulus, and Formal verification flows. You will report to the Director of Engineering (Verification).
KEY RESPONSIBILITIES
- Project Leadership
- Help develop test plan definition
- Micro-architecture design verification, RTL verification, and documentation
- Top-level and block-level functional and performance verification, and system-level use-case verification; and
- Support test program development, chip validation, and chip life until production maturity.
- Team Management and Building
- Collaboration with firmware, software, DV, FPGA, DFT, SoC integration, and backend teams throughout various stages of ASIC development.
Qualifications
- 8+ years of experience in UVM verification and UVM environment development (must have)
- Proficient in test plan definition and test case development in C/Assembly/System Verilog
- Expertise in verifying design at RTL level and gate-level simulation
- Good understanding of coverage analysis, performance verification, and use-case verification.
- Must have worked on AMBA AXI, AHB, and APB protocols
- Should have worked on verifying interface protocols like PCIe, USB, Ethernet, DDR3/4, LPDDR, I2C/I3C, SPI, SD/SDIO/eMMC, UART, etc.
- Experience in functional test vector development and post-silicon bring-up/debug.
- Fluency with scripting languages (e.g., Perl, Python, Shell); and
- Experience in working with repository management tools like Bitbucket/ Jenkins and bug-tracking tools like JIRA.
- BE/BTECH or ME/MTECH degree in EE/EECS/CS or equivalent.
Additional Information
Contact:
Uday
Mulya Technologies
muday_bhaskar@yahoo.com
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