Design Verification Engineer – Cache Coherency Verification
3 months ago
Design Verification Engineer – Cache Coherency Verification
Fortune 100 Organization
Location: Bangalore / Hyderabad
Design Verification Engineer – Cache Coherency Verification
Introduction
As a Hardware Developer at , you’ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable our customers to make better decisions quicker on the most trusted hardware platform in today’s market.
Your Role and Responsibilities
- As a Functional verification engineer, you will be working on the latest generation of high end, state-of-the-art micro-processors used in servers.
- Lead the development of the verification plans, environment, testbenches and writing testcases to verify Cache structures & protocols in processor.
- Develop skills in Functional verification tools and methodologies.
- Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design
- Work with development team to ensure coverage criteria is met.
Required Technical and Professional Expertise
- 8 + years of experience in Functional Verification of processors or ASICs.
- 3+ years of experience in Multi-processor Cache (L2/L3) Coherency, Memory Hierarchy Verification and knowledge in any of the following
- Computer architecture.
- Performance parameters in Cache Memory Hierarchy/Controller designs and ways to stress verify them
- Minimum one full life cycle leadership experience of a processor/SoC verification flow with focus on Cache Coherency Verification
- Developed test-plans and test strategies for IP/unit/block level verification of Cache Coherency structures in processor/SoC
- Good object-oriented programming skills in C++/SV, scripting languages like Python/Perl.
- Knowledge of functional verification methodology like UVM/OVM
- Knowledge of HDLs (VHDL/Verilog)
- Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow
- Exposure in developing testbench environment, write complex test scenarios, debugging and triaging fails
- Experience in driving verification coverage closure including performance testing, stress testing and ability to identify corner case scenarios.
Preferred Technical And Professional Expertise
- Good understanding of computer system architecture and microarchitecture.
- Knowledge of design patterns in programming
Contact:
Uday
Mulya Technologies
muday_bhaskar@yahoo.com
"Mining The Knowledge Community"
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