Senior Cache Coherency Verification Engineer
2 months ago
We are seeking a seasoned Senior Cache Coherency Verification Engineer to join our elite team of hardware developers at Mulya Technologies. As a key contributor, you will be responsible for leading the development of verification plans, environments, and testbenches for high-end micro-processors used in servers.
About the Role
In this pivotal position, you will work closely with design teams and other stakeholders to debug and fix logic design issues, ensuring a quality design. Your expertise in functional verification tools and methodologies will enable you to develop complex test scenarios, debug failures, and drive verification coverage closure. Additionally, you will collaborate with the development team to ensure that coverage criteria is met, and performance testing, stress testing, and corner case scenarios are identified and addressed.
About You
To be successful in this role, you will need 8+ years of experience in functional verification of processors or ASICs, with a strong background in multi-processor cache (L2/L3) coherency, memory hierarchy verification, and computer architecture. You should also have hands-on experience with C++/SV, Python/Perl, UVM/OVM, VHDL/Verilog, Linux/Unix environments, GIT repositories, and Continuous Integration and DevOps workflows. A good understanding of system architecture and microarchitecture, as well as design patterns in programming, would be highly beneficial.
What We Offer
This exciting opportunity comes with an estimated salary of $140,000 per year, reflecting the company's commitment to attracting top talent. The location is Bangalore / Hyderabad, offering a great balance between work and personal life. At Mulya Technologies, we prioritize innovation, teamwork, and professional growth, providing a dynamic and inclusive environment where you can thrive and make meaningful contributions.
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