Full Chip Emir Lead

BE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical Design Detailed knowledge of EDA tools and flows for power, Ansys Redhawk /Cadence Voltus experience is must Experience – 4-6 years Well versed with the power grid design and power calculation methodologies Role involves tasks in estimating power using industry standard tool , designing...

Role Overview:Job Title : PNR LeadExperience : 8+ YearsWork location : BangaloreJob Description:Technical Skills: Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks...

Role Overview:Job Title : PNR LeadExperience : 8+ YearsWork location : BangaloreJob Description:Technical Skills: Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks...

Role Overview:Job Title : PNR LeadExperience : 8+ YearsWork location : BangaloreJob Description:Technical Skills: Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks...

Job DescriptionJob Summary:   We are seeking a highly skilled and experienced Physical Design Lead with expertise in full-chip Redistribution Layer (RDL), bump, and packaging interface. The ideal candidate will lead the physical design efforts of our advanced semiconductor products, ensuring optimal performance, manufacturability, and reliability. This...

QualificationBachelors degree in Engineering or any relevant discipline.5+ Years of Professional Experience in the Domain.Mandatory Skills:Deep understating and experience of STA tool PrimeTime /Tweaker/ DMSA(PTECO) .Strong TCL/scripting knowledge is mandatory.Experience in timing closure of high frequency blocks & subsystems (Ghz range ).Experience in...

Role Overview: Job Title : PNR Lead Experience : 8+ Years Work location : Bangalore Job Description: Technical Skills: Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM...

Siemens EDA, a part of Siemens Digital Industries Software, is a global technology leader in electronic design automation. Our technologies enable companies around the world to develop new, highly innovative electronic products faster and more cost-effectively. Our customers use our solutions to push the boundaries of technology to deliver better products in...

Siemens EDA, a part of Siemens Digital Industries Software, is a global technology leader in electronic design automation. Our technologies enable companies around the world to develop new, highly innovative electronic products faster and more cost-effectively. Our customers use our solutions to push the boundaries of technology to deliver better products in...

Role Overview:Job Title : PNR LeadExperience : 8+ YearsWork location : BangaloreJob Description:Technical Skills: Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks...

Role Overview: Job Title : PNR Lead Experience : 8+ Years Work location : Bangalore Job Description: Technical Skills: Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM...

Role Overview:Job Title : PNR LeadExperience : 8+ YearsWork location : BangaloreJob Description:Technical Skills:Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage designDeep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks and...

Analog Circuit Design Engineers/Leads with 4-12 years of experience to join our team!As an Analog Circuit Design Lead, you will be responsible for critical block designs such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap ckts, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier, etc.You will also have experience in dealing...

Hiring Analog Circuit Design Engineers/Leads/Managers to join their team! If you have 5-20 years of experience and hands-on expertise in designing critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap ckts, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier, and in dealing with challenges in lower technology...

About the jobIf you are looking to join an ingenious, vigorous & ambitious team that consistently delivers groundbreaking technologies into the custom mobile electronics world, here is an opportunity for you!The Custom product business is delivering industry leading custom IC system solutions including display and touch power products, camera PMICs, charger...

LTTS is hiring for Physical Design Lead with 7+ years of experience on below JD ::JD for PnR – 7+ ’ experience- IP/Block level PnR activities from Netlist to GDS-II.- Good knowledge of all PnR activities like Floor-planning, Placement, CTS, Routing, Timing closure(STA), signoff checks like FEV, VCLP, EMIR and PV.- Knowledge of industry stanrd E tools...

About the jobIf you are looking to join an ingenious, vigorous & ambitious team that consistently delivers groundbreaking technologies into the custom mobile electronics world, here is an opportunity for you!The Custom product business is delivering industry leading custom IC system solutions including display and touch power products, camera PMICs, charger...

LTTS is hiring for Physical Design Lead with 7+ years of experience on below JD ::JD for PnR – 7+ ’ experience-IP/Block level PnR activities from Netlist to GDS-II.-Good knowledge of all PnR activities like Floor-planning, Placement, CTS, Routing, Timing closure(STA), signoff checks like FEV, VCLP, EMIR and PV.-Knowledge of industry stanrd E tools...

Job Description Provide technical and managerial Leadership to a PD team for a SoC Chip development owning partitions and full-chip from synthesis to place and route through all sign-off including timing signoff, physical verification, EMIR signoff, and formal verification. Influence tools, flows, and overall design methodology in design...

Logic Design - Chip Infrastructure and SecurityFortune 100 companyLocation BangaloreAs a Logic design lead, you will be responsible for leading the design and development of the POR Boot Engine, Boot security features, and the test & debug infrastructure for very high performance Processor chips/ ASICs. You will be part of the design team which will deliver...