Lead dft engineer
4 weeks ago
Job Title: Lead DFT EngineerExperience: 7+ Years Location: Bangalore Employment Type: Full-time Industry: Semiconductors / ASIC / So C DesignJob Summary:We are looking for a Lead DFT Engineer to drive DFT architecture, planning, and implementation across complex So C/ASIC designs. As a technical leader, you will mentor junior engineers, collaborate with cross-functional teams, and ensure world-class testability and manufacturability of silicon products.Key Responsibilities:Define and drive DFT strategy and architecture for multiple ASIC/So C projects.Lead implementation and verification of DFT features like:Scan insertion and compression (e.g., EDT)ATPG pattern generation and fault gradingMBIST and Logic BIST insertion and validationBoundary scan (IEEE 1149.1/1149.6), IJTAG (1687)Manage end-to-end DFT flow — from RTL to gate-level netlist and silicon bring-up.Collaborate with RTL, STA, PD, and test engineering teams for seamless integration.Perform pattern generation, fault simulation, and debug test coverage gaps.Own DFT signoff, timing closure (DFT-related paths), and ATE pattern delivery.Support silicon bring-up, test vector validation on ATE, and yield optimization.Mentor and guide junior DFT engineers; conduct design reviews and training sessions.Develop and maintain DFT automation scripts and infrastructure.Required Skills and Experience:B. E./B. Tech or M. E./M. Tech in Electronics, Electrical, or VLSI Design.7+ years of experience in DFT for complex ASIC or So C designs.Expertise in scan insertion, compression, ATPG, MBIST, and boundary scan.Hands-on experience with DFT tools such as:Synopsys: DFT Compiler, Tetra MAX, Test MAXSiemens EDA: Tessent Scan Pro, MBIST, IJTAGCadence/others: Modus, Encounter TestStrong knowledge of RTL design, STA, and synthesis flows.Proficient in scripting languages (Python, Perl, Tcl) for flow automation.Deep understanding of silicon test challenges and test coverage improvement.Strong leadership, team collaboration, and communication skills.Preferred Qualifications:Experience with hierarchical DFT and low-power DFT methodologies (UPF).Exposure to post-silicon validation and failure analysis.Familiarity with safety-critical designs (ISO 26262) and functional safety.Experience working in advanced nodes (e.g., 7nm, 5nm, Fin FET).Why Join Us?Lead DFT for high-performance, next-gen So Cs and ASICs.Collaborate with top-tier engineers and global semiconductor leaders.Competitive salary, leadership exposure, and fast-track growth opportunities.Interested can share CV to
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DFT- Staff Engineer
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Chennai, Tamil Nadu, India Qualcomm Full time ₹ 1,00,00,000 - ₹ 2,00,00,000 per yearCompany:Qualcomm India Private LimitedJob Area:Engineering Group, Engineering Group > Hardware EngineeringGeneral Summary:Be a member of the team that plays a significant role in ensuring the quality of Connectivity SoCs through structured DFT, Automatic Test Pattern Generation (ATPG) and Memory Built-In Self-Test (MBIST) techniques.Minimum...
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Dft-mbist engineer
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Chennai, India Proxelera Full timeRoles and Responsibilities:5+Yrs of experience in DFT DesigngeeOwn end-to-end DFT architecture, planning, and implementation for complex So Cs.Develop and integrate scan, MBIST/LBIST, boundary scan (IEEE 1149.1/1500), and compression.Generate ATPG patterns, analyze coverage, and drive defect reduction/yield improvements.Expertise with Tessent/DFTAdvisor/Spy...
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DFT-MBIST Engineer
1 day ago
Chennai, India Proxelera Full timeRoles and Responsibilities:- 5+Yrs of experience in DFT Designgee- Own end-to-end DFT architecture, planning, and implementation for complex SoCs.- Develop and integrate scan, MBIST/LBIST, boundary scan (IEEE 1149.1/1500), and compression.- Generate ATPG patterns, analyze coverage, and drive defect reduction/yield improvements.- Expertise with...
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Tele Caller Executive
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Ramapuram, Chennai, Tamil Nadu, India DMI Foundations (DFT) - Group of institutions Full timeWe require "TELE CALLER EXECUTIVE" for DMI Foundations (DFT) - DMI Group of institutions **Job Description**: - Contact the prospective leads via phone calls to guide about the available courses and admission process in the constituent colleges. - To be polite in handling phone calls. - Maintain correct follow-ups and ensure to admit the students till the...
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Bengaluru, Chennai, Hyderabad, India ti Steps Full time ₹ 8,00,000 - ₹ 12,00,000 per yearAbout the Role:We are seeking a skilled and detail-oriented Design Testability Engineer (DFT Engineer) to join our hardware design team. The ideal candidate will be responsible for developing and implementing Design for Test (DFT) strategies for complex SoCs, ASICs, or IC designs to ensure high-quality and efficient silicon testing and validation.Key...
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WiFi MAC Design
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Chennai, India Qualcomm Full timeJob Description Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary - Strong fundamentals in core areas: Microarchitecture, Computer Arithmetic, Circuit Design, Process Technology - Strong communication skills to work with design teams worldwide - Extensive experience in Synthesis (DC or...