Lead memory design engineer

5 days ago

Bangalore, India ACL Digital Full time

Lead Memory Design Engineer Responsibilities: As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA. Required Skills and Experience : Understanding of computer architecture and concepts. Good understanding of SRAM architecture, Critical Path Modelling, Full Cut Analysis and Monte Carlo Simulations. Good experience in design verification: Sense amplifier analysis, self-time analysis and marginality analysis. Understanding of high speed/low power CMOS circuit design, clocking scheme, Static and complex logic circuits. Understanding of Power versus Performance versus Area trade-offs in typical CMOS design. Strong knowledge of physical implementation impact on circuit performance. Good understanding of high-performance and low power circuit designs with exposure to Fin Fet technologies, bitcell stability analysis Proven experience as the designated responsible individual for a memory design, leading a small team of designer. Expected to have good interpersonal skills. Circuit Design: Design and develop digital circuits for memory blocks like SRAM, register files, and caches. Simulation and Verification: Perform simulations and verification to ensure functionality and optimize for power, performance, area, timing, and yield. Minimum 7 Yrs of experience in SRAM / memory design Margin, Char and its related quality checks. Nice To Have Skills and Experience : Some Experience of working on Cadence or Synopsys flows. Experience with Circuit Simulation and Optimization of standard cells. Experience: 8 to 15 Years Notice Period: 30 to 90 Days Location: Bangalore About Company ACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud. By choosing ACL Digital, you gain a strategic advantage in navigating the complexities of digital transformation. Let us be your trusted partner in shaping the future.

  • Lead memory design engineer

    5 days ago

    Bangalore, India ACL Digital Full time

    Job Title: Lead Memory Design Engineer Experience: 6+ Years Location: Bangalore Employment Type: Full-time Industry: Semiconductors / VLSI / Memory IP / So C Job Summary: We are looking for an experienced and highly motivated Lead Memory Design Engineer to drive the architecture, design, and development of advanced memory IPs such as SRAMs,...

  • Lead Memory Design Engineer

    1 week ago

    bangalore, India ACL Digital Full time

    Job Title: Lead Memory Design EngineerExperience: 6+ Years Location: Bangalore Employment Type: Full-time Industry: Semiconductors / VLSI / Memory IP / SoCJob Summary:We are looking for an experienced and highly motivated Lead Memory Design Engineer to drive the architecture, design, and development of advanced memory IPs such as SRAMs, ROMs, CAMs, and...

  • Lead Memory Design Engineer

    1 day ago

    bangalore district, India ACL Digital Full time

    Job Title: Lead Memory Design Engineer Experience: 6+ Years Location: Bangalore Employment Type: Full-time Industry: Semiconductors / VLSI / Memory IP / SoC Job Summary: We are looking for an experienced and highly motivated Lead Memory Design Engineer to drive the architecture, design, and development of advanced memory IPs such as SRAMs,...

  • Memory design engineer

    5 days ago

    Bangalore, India ACL Digital Full time

    Job Title: Memory Design Engineer Experience Required: 2+ Years Location: Bangalore Job Type: Full-time Industry: Semiconductors / VLSI / Memory IP Job Summary: We are seeking a skilled Memory Design Engineer to join our advanced memory IP development team. The candidate will be responsible for architecting, designing, and validating...

  • Memory design engineers

    5 days ago

    Bangalore, India ACL Digital Full time

    Job Title: Memory Design Engineer Experience Required: 2+ Years Location: Bangalore Job Type: Full-time Industry: Semiconductors / VLSI / Memory IP Job Summary: We are seeking a skilled Memory Design Engineer to join our advanced memory IP development team. The candidate will be responsible for architecting, designing, and validating...

  • Lead Memory Design Engineer

    1 week ago

    bangalore, India ACL Digital Full time

    𝗟𝗲𝗮𝗱 𝗠𝗲𝗺𝗼𝗿𝘆 𝗗𝗲𝘀𝗶𝗴𝗻 𝗘𝗻𝗴𝗶𝗻𝗲𝗲𝗿𝗥𝗲𝘀𝗽𝗼𝗻𝘀𝗶𝗯𝗶𝗹𝗶𝘁𝗶𝗲𝘀: As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA.𝗥𝗲𝗾𝘂𝗶𝗿𝗲𝗱...

  • Memory Design Engineer

    1 week ago

    Bangalore, India ACL Digital Full time

    Job Title: Memory Design Engineer Experience Required: 2+ Years Location: Bangalore Job Type: Full-time Industry: Semiconductors / VLSI / Memory IP Job Summary: We are seeking a skilled Memory Design Engineer to join our advanced memory IP development team. The candidate will be responsible for architecting, designing, and...

  • Memory Design Engineer

    1 week ago

    bangalore, India ACL Digital Full time

    Job Title: Memory Design EngineerExperience Required: 2+ YearsLocation: BangaloreJob Type: Full-timeIndustry: Semiconductors / VLSI / Memory IPJob Summary:We are seeking a skilled Memory Design Engineer to join our advanced memory IP development team. The candidate will be responsible for architecting, designing, and validating high-performance and low-power...

  • Memory Design Engineers

    1 week ago

    bangalore, India ACL Digital Full time

    Job Title: Memory Design EngineerExperience Required: 2+ Years Location: Bangalore Job Type: Full-time Industry: Semiconductors / VLSI / Memory IPJob Summary:We are seeking a skilled Memory Design Engineer to join our advanced memory IP development team. The candidate will be responsible for architecting, designing, and validating high-performance and...

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    1 week ago

    Bangalore, India ACL Digital Full time

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