Senior Memory Design Lead Engineer

1 day ago


bangalore, India ACL Digital Full time

Position: Senior Memory Design Lead EngineerLocation: Bangalore Responsibilities:As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA.Required Skills and Experience :Understanding of computer architecture and concepts.Basic understanding of CMOS Transistors, their behaviors.Understanding of high speed/low power CMOS circuit design, clocking scheme, Static and complex logic circuits.Understanding of Power versus Performance versus Area trade-offs in typical CMOS design.You have an engineering demeanor and Passion for Circuit design.Expected to have good interpersonal skills.Minimum 8+ Yrs of experience in SRAM / memory design Margin, Char and its related quality checks.Nice To Have Skills and Experience :You know basic scripting languages, e.g. Perl/TCL/Python.Some Experience of working on Cadence or Synopsys flows.Experience with Circuit Simulation and Optimization of standard cells.Interested candidates can apply/share/refer profile at Krishnaprasath.s@acldigital.com



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