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Senior Manager – ASIC Digital Design
1 week ago
To be part of a highly skilled and challenging high speed PHY design team working on the latest technology nodes (12nm and below).Define the digital architecture and microarchitecture of the IP’s and its sub functionsManage and mentor a team of talented digital designers.Responsible for all aspects of digital design from specification to silicon along with its integration with SoC.Active involvement in problem solving and implementing opportunities for improvement.Driving innovation and develop new architectures for best-in-class solutionMentoring and coaching other design team members on technical issuesPair with similar domain specialists across other geographical locations on core technical initiativesPair with Analog designers to ensure smooth interface between Digital and Analog circuitsEqual opportunity position with excellent pay package
SKILLS required:
Experience in end of end ownership of digital design of at least one of the ONFI, DDR , LPDDR, MIPI or PCIe PHY IP from specifications to siliconExperience of silicon bring and debug of aforesaid IPsExperience of leading and guiding a team of digital designers and collaborating with verification and physical design engineersStrong fundamental knowledge for Verilog and scripting languages, timing closure, DFT, Synthesis, Lint & CDCStrong knowledge of Asynchronous domain transfer schemes, cores, APB/JTAGWorking knowledge of RTL2GDS flowsExperience of working with Analog team for Mixed signal data pathsExperience in leading R&D and future technology development projects.The position requires good written & verbal communication skills as well a strong commitment and ability to work in cross functional and globally dispersed teams.Team leadership experience, including planning and managing tasks is desirable, BS/BE (Electronics)Experience Required
: 15+ Years
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