SRAM Memory Layout Engineer

Hi ,We are hiring Layout Engineers for different streams as follows. Kindly share your CV to Memory Layout JD::· Must have 3 to 7 years of experience in SRAM Memory Layout / standard cell layout designs in advanced CMOS process.· Should have expertise in multiple standard cell layout library developments.· Should be able to perform standard cell layout...

Job Location: BangaloreNotice Period: Immediate or 15 daysExp:3+ yearsResponsible for Memory Compiler layout development and verification.· Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM.· Perform layout verification like LVS/ DRC/ Latchup, quality...

The development of product grade SRAM memory IP's covering the following phases: Layout Design of SRAM Memory IPs Layout checks like LVS,DRC,DFM, EMIR Review of Layouts and extend help for other Layout teams Design Kit prep from layout side, verification and validation Layout automation and script support Being a good team-player taking key...

Job DescriptionSRAM DESIGNTeam: End to end SRAM design for Mediatek’s processors (CPU, GPU, AI) - SRAM Design, Layout, Qualification, Release, Silicon validationQualification:Required Experience : 5 – 8 YearsDegree : ME/M.Tech in Electronic Engineering R&R:Working with the SRAM team responsible for FCI design for xCPU systems from R2G.Collaborate with...

Team: End to end SRAM design for Mediatek’s processors (CPU, GPU, AI) - SRAM Design, Layout, Qualification, Release, Silicon validationQualification:·Required Experience : 5 – 8 Years·Degree : ME/M.Tech in Electronic EngineeringR&R:·Working with the SRAM team responsible for FCI design for xCPU systems from R2G.·Collaborate with CPU/GPU/APU team to...

We are now looking for a CAD Layout Design Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a...

Memory Layout Experience: 4 to 6 years Skills required: Hands-on Experience in top level memory Layout. Technode experience from 28nm -3nm Experience Using Cadence Virtuoso Layout Editor, Mentor Graphics Calibre, Verification Tool Performing various kinds of layouts, implementations from top-level, floor planning down to complex block level layouts....

Memory Layout Experience: 4 to 6 years Skills required:Hands-on Experience in top level memory Layout.Technode experience from 28nm -3nmExperience Using Cadence Virtuoso Layout Editor, Mentor Graphics Calibre, Verification ToolPerforming various kinds of layouts, implementations from top-level, floor planning down to complex block level layouts.Knowledge of...

We are now looking for a Senior Circuit Design Engineer ! This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have created a team of exceptional people stretching around the globe,...

Analog Devices Foundation IP group is seeking an experiencedSenior Circuit Design Engineer to develop logic IPs (standard cells and memories) to support analog, digital and mixed-signal SOC designs at various technology nodes.Responsibilities would include, but are not limited to: Support internal and external memory compilers. Memory instance view...

Position: Senior Memory Design EngineerLocation: Bangalore / NoidaResponsibilities:As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA.Required Skills and Experience :Understanding of computer architecture and concepts.Basic understanding of CMOS...

The Digital IP (DIP) group at NVIDIA is an organization of circuit design and CAD engineers that creates a wide variety of IP for the chips NVIDIA designs. This group works closely with internal SOC design, silicon testing, and productization teams that turn our IP into products that change the world. One of the roles fulfilled by the DIP group is to develop...

# 1. Memory layout - Sr. Engineer / Lead Bengaluru, India Experience: 4-8 Yrs Skills required: •      Hands-on Experience in top level memory Layout. •      Technode experience from 28nm -3nm •      Experience Using Cadence Virtuoso Layout Editor, Mentor Graphics Calibre, Verification Tool •      Performing various kinds of...

# 1. Memory layout - Sr. Engineer / LeadBengaluru, IndiaExperience: 4-8 YrsSkills required:•      Hands-on Experience in top level memory Layout.•      Technode experience from 28nm -3nm•      Experience Using Cadence Virtuoso Layout Editor, Mentor Graphics Calibre, Verification Tool•      Performing various kinds of layouts,...

Company DescriptionM31 Technology Corporation is a professional silicon intellectual property (IP) provider. With its headquarters in Hsinchu, Taiwan, M31 has substantial experiences in IP development, IC design, and electronic design automation fields. They specialize in providing high-speed interface IPs, memory compilers, and standard cell library...

Position : Senior Memory Design Engineer Location : Bangalore / Noida Responsibilities : As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA. Required Skills and Experience : - Understanding of computer architecture and concepts. - Basic...

Staff Application Engineer:Requisition Requirements• Design and verification experience in clocking circuits (PLLs), data converters(ADCs, DAC) and other analog circuits• Experience in memory design and verification of SRAM, SRAM compilers,DRAM, Flash or other non-volatile memories would be an asset.• Knowledge of competitive EDA tool products and...

Description and Requirements This role is for a PCB Layout engineer in the Lenovo Datacenter Product Group (DCG), based out of Bangalore, Karnataka. This role is core to the Server Development organization in providing the end-to-end design and deliver innovative server designs across DCG. In this role, you will be working with Hardware...

Memory Characterization Engineer (1 8 years)Skills: C,PerlJob Locations: Bangalore/BangaluruTotal vacancies: 6 Should have Strong fundamentals in Memory, Processor and System Architecture Should be well versed in System Level Debugging Silicon Bring Up Should have expertise in C and Perl Should have Strong Communication skills

Skills/Experience:- Experience in Analog Mixed-signal layout and verification of high-speed digital and/or DDR IOs, Critical signal inclusion.- Advanced understanding of Deep submicron effects and mitigation, Advanced tool usage, Advanced floorplanning techniques, understand digital flow, Advanced strategies.- Solid understanding of CMOS and FinFET layouts...