Memory & Analog Layout
4 weeks ago
# 1. Memory layout - Sr. Engineer / Lead
Bengaluru, India
Experience: 4-8 Yrs
Skills required:
• Hands-on Experience in top level memory Layout.
• Technode experience from 28nm -3nm
• Experience Using Cadence Virtuoso Layout Editor, Mentor Graphics Calibre, Verification Tool
• Performing various kinds of layouts, implementations from top-level, floor planning down to complex block level layouts.
• Knowledge of different layout techniques, understanding of critical constraints in the circuit to be taken care of in layout.
• Should have good knowledge in CMOS/FinFET Layout concepts, Device Physics, and Fabrication concepts.
• Perl and Shell Scripting (Preferred).
# 2. Analog Layout Engineer
Experience : 4-8 Years
Detailed JD Below :
- Should have 5+ Years of experience in Custom Layout.
- Able to execute independently on any Analog and PMIC layout design blocks from schematics.
- Should have work experience in technologies – 180nm BCD – FinFet 5nm .
- Hands on Experience on analog and PMIC modules like ,LDO ,BGR,Charger etc
- Work experience in Cadence Virtuoso Layout Editor , Mentor Calibre etc
- Performing various kinds of analog layouts, implementations from top-level, floor planning down to complex blocks .
- Should have worked on DRC/LVS/Antenna Checks,
- Responsible for timely and quality execution of layout design.
- Flow experience is an added advantage .
- Should be flexible with respect to work hours.
Job Location: Bangalore
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bangalore, India Leading VLSI Company Full time# 1. Memory layout - Sr. Engineer / Lead Bengaluru, India Experience: 4-8 Yrs Skills required: • Hands-on Experience in top level memory Layout. • Technode experience from 28nm -3nm • Experience Using Cadence Virtuoso Layout Editor, Mentor Graphics Calibre, Verification Tool • Performing various kinds of...
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