Application Specific Integrated Circuit Design Engineer

4 weeks ago

Bangalore Urban, India Globex Digital Full time

Role - Senior ASIC/SoC RTL Engineer/Lead

Experience - 5+ years

Location - Hyderabad, Bangalore, Pune and Kochi

Notice Period - Immediate to 60 days


JD of Senior ASIC/SoC RTL Engineer/Lead

  • Expertise in SoC subsystem/IP design
  • Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog
  • In depth knowledge on RTL quality checks (Lint, CDC)
  • Knowledge of synthesis and low power is a plus
  • Good understanding of AMBA bus protocols (AXI, AHB, ATB, APB)
  • Good understanding of timing concepts
  • Knowledge of one or more of the interface protocols a. PCIe b. DDR c. Ethernet d. I2C, UART, SPI
  • Expertise in setting up and using tools like a. Spyglass Lint/CDC b. Synopsys DC c. Verdi/Xcellium
  • Understanding of scripting languages like Make flow, Perl ,shell, python etc
  • Understanding of processor architecture and/or ARM debug architecture is a plus
  • Able to help and debug issues for multiple subsystems
  • Able to create/review design documents for multiple subsystems
  • Able to support physical design, verification, DFT and SW teams on design queries and reviews

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