Digital Design Verification Lead
2 weeks ago
Digital Design Verification Lead
who will be responsible for providing technical leadership to the DV team, while managing IP development and delivery.The ideal candidate would be someone with strong technical background combined with management acumen and demonstrable ability to handle ambiguity while still finding creative ways to make things happen.A key focus area for this position includes interacting and engaging with internal customers to communicate, identify, improve, and maintain developed IP, as well as scout for 3rd party IPs and evaluate them on a regular basis for future requirements.Job Responsibilities:Verification of complex designs such as accelerators/ datapath IP, processor core subsystems, complex interfaces/ protocols such as DDR/ Ethernet/ USB
etc using leading edge methodologies like
UVM
&
Formal DVCreate verification strategies
and influence the decisions on methodologies to be adopted for the verification at block and sub-system levelArchitect the testbench and develop the verification environment
in UVM and Formal based verification approachesDefine testplan, tests and verification methodology
for block / sub-system level verification. Work with design team in generating test-plans and closure of code and functional coverage.Integrate the block testbench at sub-system level UVM environment and verify integration. Interact with analog co-sim and firmware team in enabling toplevel chip verification aspectsPackage verification environment for Digital IP
for seamless integration into verification flow at different stages of executionTechnically mentor
and lead a team of verification engineersConduct detail-oriented DV reviews
and drive adherence to quality metricsEvaluate 3rd party IPs
on key qualitative aspects such as design quality, robustness of Design Verification (DV) practice, ease of DV environment integration and make recommendations. Establish evaluation flows for home-grown & 3rd party IPs for consistent benchmarking of DV evaluationBuild deep expertise on complex interfaces
, peripherals & protocols such as DDR, Ethernet, eMMC/ SD, MIPI, Display Port, HDMI, PCIe, high speed D2DSupport post-silicon verification/ validation activities
of the products working with design, product evaluation and applications engineering teamDrive efforts towards development of Design Management and IP Centric infrastructure and flows
across different tools such as Methodics / Perforce / Github / IP catalog creation etcEstablish evaluation flows
for home-grown & 3rd party IPs for consistent benchmarking of evaluationManage & streamline efforts towards consolidation/ curation of digital IP blocks
, such as standard peripherals, processor cores & collaterals, high speed protocol & interface IPStrive to remove complexity and ambiguity
within the teams and their processes. Ability to distil and provide clear and actionable recommendations to the teamPosition Requirements:Minimum B.E./ B.Tech/ M.Tech degree in Electrical/Electronics/Computer science10+ years of experience in design verification with UVM and constrained random, coverage based verification approachesStrong understanding of DV concepts with an eye on developing scalable DV environment architecture that realizes first pass DV successExperience with translating Design Verification (DV) requirements such as test plans into a robust DV environment and generate coverage metrics for demonstrating DV convergenceIn-depth knowledge of Assertion based formal verificationAdaptability to learn end application/systems and map into smart verification test plansExcellent debugging and analytical skillsGood interpersonal, teamwork and communication skills to logically & effectively drive discussions with teams spread geographicallyUnderstanding of standard on-chip interfaces such as APB/AHB/AXI/ Stream protocols is a strong plusKnowledge of Processor/SoC architecture and/or DSP fundamentals is a strong plusExperience with ASIC/ SoC product DV & productization is very desirableProven experience in managing/ handling large complex hardware projects in lead roleServe as the focal point for communications. Compile regular status updates for all stakeholders and effectively escalate critical issues and risks as necessaryJob Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days
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Digital Design Verification Lead
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Bengaluru, India Analog Devices Full timeDigital Design Verification Engineer Job Responsibilities: Verification of complex designs such as accelerators/ datapath IP, processor core subsystems, complex interfaces/ protocols such as DDR/ Ethernet/ USB etc using leading edge methodologies like UVM & Formal DV Architect the testbench and develop the verification environment in UVM...
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Bengaluru, India Cadence Design Systems Full timeJob Description:Roles & Responsibilities:Exp- 12 - 16 yrs The role requires the management of a SerDes DV group focusing on MDV verification including: Constrained Random Functional Verification, Formal Property Verification, project DV status and execution, and mentorship of junior engineers.The role requires the ability to work with the existing functional...
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Design Verification Lead
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